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Mon, 07 Feb 2022 16:24:28 -0800 (PST) Received: from [192.168.1.128] ([71.205.29.0]) by smtp.gmail.com with ESMTPSA id t2sm2986140ilp.49.2022.02.07.16.24.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Feb 2022 16:24:28 -0800 (PST) Subject: Re: [PATCH v11 33/40] kselftest/arm64: Extend vector configuration API tests to cover SME To: Mark Brown , Catalin Marinas , Will Deacon , Marc Zyngier , Shuah Khan Cc: Alan Hayward , Luis Machado , Salil Akerkar , Basant Kumar Dwivedi , Szabolcs Nagy , James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, kvmarm@lists.cs.columbia.edu, Shuah Khan References: <20220207152109.197566-1-broonie@kernel.org> <20220207152109.197566-34-broonie@kernel.org> From: Shuah Khan Message-ID: <32b86e20-8a4e-42ac-f5d9-188f1d80e412@linuxfoundation.org> Date: Mon, 7 Feb 2022 17:24:27 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20220207152109.197566-34-broonie@kernel.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org On 2/7/22 8:21 AM, Mark Brown wrote: > Provide RDVL helpers for SME and extend the main vector configuration tests > to cover SME. > > Signed-off-by: Mark Brown > --- > tools/testing/selftests/arm64/fp/.gitignore | 1 + > tools/testing/selftests/arm64/fp/Makefile | 3 ++- > tools/testing/selftests/arm64/fp/rdvl-sme.c | 14 ++++++++++++++ > tools/testing/selftests/arm64/fp/rdvl.S | 10 ++++++++++ > tools/testing/selftests/arm64/fp/rdvl.h | 1 + > tools/testing/selftests/arm64/fp/vec-syscfg.c | 10 ++++++++++ > 6 files changed, 38 insertions(+), 1 deletion(-) > create mode 100644 tools/testing/selftests/arm64/fp/rdvl-sme.c > > diff --git a/tools/testing/selftests/arm64/fp/.gitignore b/tools/testing/selftests/arm64/fp/.gitignore > index c50d86331ed2..6e9a610c5e5d 100644 > --- a/tools/testing/selftests/arm64/fp/.gitignore > +++ b/tools/testing/selftests/arm64/fp/.gitignore > @@ -1,5 +1,6 @@ > fp-pidbench > fpsimd-test > +rdvl-sme > rdvl-sve > sve-probe-vls > sve-ptrace > diff --git a/tools/testing/selftests/arm64/fp/Makefile b/tools/testing/selftests/arm64/fp/Makefile > index 95f0b877a060..a224fff8082b 100644 > --- a/tools/testing/selftests/arm64/fp/Makefile > +++ b/tools/testing/selftests/arm64/fp/Makefile > @@ -3,7 +3,7 @@ > CFLAGS += -I../../../../../usr/include/ > TEST_GEN_PROGS := sve-ptrace sve-probe-vls vec-syscfg > TEST_PROGS_EXTENDED := fp-pidbench fpsimd-test fpsimd-stress \ > - rdvl-sve \ > + rdvl-sme rdvl-sve \ > sve-test sve-stress \ > vlset > > @@ -13,6 +13,7 @@ fp-pidbench: fp-pidbench.S asm-utils.o > $(CC) -nostdlib $^ -o $@ > fpsimd-test: fpsimd-test.o asm-utils.o > $(CC) -nostdlib $^ -o $@ > +rdvl-sme: rdvl-sme.o rdvl.o > rdvl-sve: rdvl-sve.o rdvl.o > sve-ptrace: sve-ptrace.o > sve-probe-vls: sve-probe-vls.o rdvl.o > diff --git a/tools/testing/selftests/arm64/fp/rdvl-sme.c b/tools/testing/selftests/arm64/fp/rdvl-sme.c > new file mode 100644 > index 000000000000..49b0b2e08bac > --- /dev/null > +++ b/tools/testing/selftests/arm64/fp/rdvl-sme.c > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: GPL-2.0-only > + > +#include > + > +#include "rdvl.h" > + > +int main(void) > +{ > + int vl = rdvl_sme(); > + > + printf("%d\n", vl); > + > + return 0; > +} > diff --git a/tools/testing/selftests/arm64/fp/rdvl.S b/tools/testing/selftests/arm64/fp/rdvl.S > index c916c1c9defd..20dc29996dc6 100644 > --- a/tools/testing/selftests/arm64/fp/rdvl.S > +++ b/tools/testing/selftests/arm64/fp/rdvl.S > @@ -1,6 +1,8 @@ > // SPDX-License-Identifier: GPL-2.0-only > // Copyright (C) 2021 ARM Limited. > > +#include "sme-inst.h" > + > .arch_extension sve > > .globl rdvl_sve > @@ -8,3 +10,11 @@ rdvl_sve: > hint 34 // BTI C > rdvl x0, #1 > ret > + > +.globl rdvl_sme > +rdvl_sme: > + hint 34 // BTI C > + > + rdsvl 0, 1 > + > + ret > diff --git a/tools/testing/selftests/arm64/fp/rdvl.h b/tools/testing/selftests/arm64/fp/rdvl.h > index 7c9d953fc9e7..5d323679fbc9 100644 > --- a/tools/testing/selftests/arm64/fp/rdvl.h > +++ b/tools/testing/selftests/arm64/fp/rdvl.h > @@ -3,6 +3,7 @@ > #ifndef RDVL_H > #define RDVL_H > > +int rdvl_sme(void); > int rdvl_sve(void); > > #endif > diff --git a/tools/testing/selftests/arm64/fp/vec-syscfg.c b/tools/testing/selftests/arm64/fp/vec-syscfg.c > index c90658811a83..9bcfcdc34ee9 100644 > --- a/tools/testing/selftests/arm64/fp/vec-syscfg.c > +++ b/tools/testing/selftests/arm64/fp/vec-syscfg.c > @@ -51,6 +51,16 @@ static struct vec_data vec_data[] = { > .prctl_set = PR_SVE_SET_VL, > .default_vl_file = "/proc/sys/abi/sve_default_vector_length", > }, > + { > + .name = "SME", > + .hwcap_type = AT_HWCAP2, > + .hwcap = HWCAP2_SME, > + .rdvl = rdvl_sme, > + .rdvl_binary = "./rdvl-sme", > + .prctl_get = PR_SME_GET_VL, > + .prctl_set = PR_SME_SET_VL, > + .default_vl_file = "/proc/sys/abi/sme_default_vector_length", > + }, > }; > > static int stdio_read_integer(FILE *f, const char *what, int *val) > Looks good to me. Reviewed-by: Shuah Khan thanks, -- Shuah