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From: Fenghua Yu <fenghuay@nvidia.com>
To: Xiaochen Shen <shenxiaochen@open-hieco.net>,
	tony.luck@intel.com, reinette.chatre@intel.com, bp@alien8.de,
	shuah@kernel.org, skhan@linuxfoundation.org
Cc: babu.moger@amd.com, james.morse@arm.com, Dave.Martin@arm.com,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v2 1/3] selftests/resctrl: Add CPU vendor detection for Hygon
Date: Fri, 5 Dec 2025 11:28:50 -0800	[thread overview]
Message-ID: <6d68f2c5-4011-4188-bdb4-27f0e6a4d13e@nvidia.com> (raw)
In-Reply-To: <20251205092544.2685728-2-shenxiaochen@open-hieco.net>

Hi, Xiaochen,

On 12/5/25 01:25, Xiaochen Shen wrote:
> The resctrl selftest currently fails on Hygon CPUs that support Platform
> QoS features, printing the error:
> 
>    "# Can not get vendor info..."
> 
> This occurs because vendor detection is missing for Hygon CPUs.
> 
> Fix this by extending the CPU vendor detection logic to include
> Hygon's vendor ID.
> 
> Signed-off-by: Xiaochen Shen <shenxiaochen@open-hieco.net>
> ---
>   tools/testing/selftests/resctrl/resctrl.h       | 6 ++++--
>   tools/testing/selftests/resctrl/resctrl_tests.c | 2 ++
>   2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
> index cd3adfc14969..411ee10380a5 100644
> --- a/tools/testing/selftests/resctrl/resctrl.h
> +++ b/tools/testing/selftests/resctrl/resctrl.h
> @@ -23,6 +23,7 @@
>   #include <asm/unistd.h>
>   #include <linux/perf_event.h>
>   #include <linux/compiler.h>
> +#include <linux/bits.h>
>   #include "../kselftest.h"
>   
>   #define MB			(1024 * 1024)
> @@ -36,8 +37,9 @@
>    * Define as bits because they're used for vendor_specific bitmask in
>    * the struct resctrl_test.
>    */
> -#define ARCH_INTEL     1
> -#define ARCH_AMD       2
> +#define ARCH_INTEL	BIT(0)
> +#define ARCH_AMD	BIT(1)
> +#define ARCH_HYGON	BIT(2)
>   
>   #define END_OF_TESTS	1
>   
> diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c
> index 5154ffd821c4..9bf35f3beb6b 100644
> --- a/tools/testing/selftests/resctrl/resctrl_tests.c
> +++ b/tools/testing/selftests/resctrl/resctrl_tests.c
> @@ -42,6 +42,8 @@ static int detect_vendor(void)
>   		vendor_id = ARCH_INTEL;
>   	else if (s && !strcmp(s, ": AuthenticAMD\n"))
>   		vendor_id = ARCH_AMD;
> +	else if (s && !strcmp(s, ": HygonGenuine\n"))
> +		vendor_id = ARCH_HYGON;
>   
Since vendor_id is bitmask now and BIT() is a UL value, it's better to 
define it as "unsigned int" (unsigned long is a bit overkill). 
Otherwise, type conversion may be risky.

Is it better to change vendor_id as "unsigned int", static unsigned int 
detect_vendor(), and a couple of other places?


>   	fclose(inf);
>   	free(res);
Thanks.
-Fenghua

  reply	other threads:[~2025-12-05 19:28 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-05  9:25 [PATCH v2 0/3] selftests/resctrl: Add Hygon CPUs support and bug fixes Xiaochen Shen
2025-12-05  9:25 ` [PATCH v2 1/3] selftests/resctrl: Add CPU vendor detection for Hygon Xiaochen Shen
2025-12-05 19:28   ` Fenghua Yu [this message]
2025-12-08  8:01     ` Xiaochen Shen
2025-12-08 17:57       ` Reinette Chatre
2025-12-09  6:10         ` Xiaochen Shen
2025-12-09 23:02           ` Reinette Chatre
2025-12-09 23:42             ` Luck, Tony
2025-12-10  0:30               ` Reinette Chatre
2025-12-10  4:46             ` Xiaochen Shen
2025-12-05  9:25 ` [PATCH v2 2/3] selftests/resctrl: Fix a division by zero error on Hygon Xiaochen Shen
2025-12-05 18:53   ` Fenghua Yu
2025-12-08  2:27     ` Xiaochen Shen
2025-12-05  9:25 ` [PATCH v2 3/3] selftests/resctrl: Fix non-contiguous CBM check for Hygon Xiaochen Shen
2025-12-05 19:39   ` Fenghua Yu
2025-12-05 21:30     ` Reinette Chatre
2025-12-05 21:51       ` Fenghua Yu
2025-12-08  8:06     ` Xiaochen Shen

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