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AJvYcCVcylFUiW4OFq/t1RLc9c9CWeRE/APMp/Eqr2FUW9CGOH0kM3VzfYRrD7FyE3heUKuix6WmVQgFj5YK9m8kXq2SMqv3F3hG+JbiGP1fIQhN X-Gm-Message-State: AOJu0YzfwdUrMCDI5OfgErQWg7D989wh0VG5Bl3Md0FCLop2yAKbGHKv PZsll3ygpOv8eEsOoWnIfF9q9z6T807Z1o8dHnFfUEDnU34zPz94ow4zUqhVO0I= X-Google-Smtp-Source: AGHT+IHtrgB69K59tQny2VA0fIN2p3RzbXA0ZFndyB8V2oCD/yBJA3LSTlidjs+c33/HgDrnv1SH7A== X-Received: by 2002:a05:6e02:1588:b0:36b:12f5:14dc with SMTP id m8-20020a056e02158800b0036b12f514dcmr4475746ilu.32.1713573426742; Fri, 19 Apr 2024 17:37:06 -0700 (PDT) Received: from [100.64.0.1] ([170.85.6.197]) by smtp.gmail.com with ESMTPSA id u4-20020a056638134400b00484c44cf9cbsm953419jad.168.2024.04.19.17.37.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 19 Apr 2024 17:37:06 -0700 (PDT) Message-ID: <6fa06233-d572-48a7-a8ef-73a7c5879c06@sifive.com> Date: Fri, 19 Apr 2024 19:37:03 -0500 Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 08/24] drivers/perf: riscv: Fix counter mask iteration for RV32 To: Atish Patra , linux-kernel@vger.kernel.org Cc: Andrew Jones , Ajay Kaher , Albert Ou , Alexandre Ghiti , Anup Patel , Conor Dooley , Juergen Gross , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paolo Bonzini , Paul Walmsley , Shuah Khan , virtualization@lists.linux.dev, Will Deacon , x86@kernel.org References: <20240420151741.962500-1-atishp@rivosinc.com> <20240420151741.962500-9-atishp@rivosinc.com> Content-Language: en-US From: Samuel Holland In-Reply-To: <20240420151741.962500-9-atishp@rivosinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Atish, On 2024-04-20 10:17 AM, Atish Patra wrote: > For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses > to interleave firmware/hardware counters indicies. Even though it's a > unlikely scenario, handle that case by iterating over all the words > instead of just using the first word. > > Reviewed-by: Andrew Jones > Signed-off-by: Atish Patra > --- > drivers/perf/riscv_pmu_sbi.c | 21 ++++++++++++--------- > 1 file changed, 12 insertions(+), 9 deletions(-) > > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c > index f23501898657..4eacd89141a9 100644 > --- a/drivers/perf/riscv_pmu_sbi.c > +++ b/drivers/perf/riscv_pmu_sbi.c > @@ -652,10 +652,12 @@ static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu) > static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu) > { > struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); > + int i; > > - /* No need to check the error here as we can't do anything about the error */ > - sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, 0, > - cpu_hw_evt->used_hw_ctrs[0], 0, 0, 0, 0); > + for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++) > + /* No need to check the error here as we can't do anything about the error */ > + sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, i * BITS_PER_LONG, > + cpu_hw_evt->used_hw_ctrs[i], 0, 0, 0, 0); > } > > /* > @@ -667,7 +669,7 @@ static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu) > static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, > unsigned long ctr_ovf_mask) > { > - int idx = 0; > + int idx = 0, i; > struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); > struct perf_event *event; > unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE; > @@ -676,11 +678,12 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, > struct hw_perf_event *hwc; > u64 init_val = 0; > > - ctr_start_mask = cpu_hw_evt->used_hw_ctrs[0] & ~ctr_ovf_mask; > - > - /* Start all the counters that did not overflow in a single shot */ > - sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask, > - 0, 0, 0, 0); > + for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++) { > + ctr_start_mask = cpu_hw_evt->used_hw_ctrs[i] & ~ctr_ovf_mask; This is applying the mask for the first 32 logical counters to the both sets of 32 logical counters. ctr_ovf_mask needs to be 64 bits wide here, so each loop iteration can apply the correct half of the mask. Regards, Samuel > + /* Start all the counters that did not overflow in a single shot */ > + sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * BITS_PER_LONG, ctr_start_mask, > + 0, 0, 0, 0); > + } > > /* Reinitialize and start all the counter that overflowed */ > while (ctr_ovf_mask) {