From: Atish Patra <atish.patra@linux.dev>
To: "Clément Léger" <cleger@rivosinc.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Shuah Khan" <shuah@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Cc: Samuel Holland <samuel.holland@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Deepak Gupta <debug@rivosinc.com>
Subject: Re: [PATCH v6 12/14] RISC-V: KVM: add SBI extension reset callback
Date: Thu, 8 May 2025 17:28:11 -0700 [thread overview]
Message-ID: <736362de-d7b8-43f7-bffc-ccc65b1502ff@linux.dev> (raw)
In-Reply-To: <20250424173204.1948385-13-cleger@rivosinc.com>
On 4/24/25 10:31 AM, Clément Léger wrote:
> Currently, only the STA extension needed a reset function but that's
> going to be the case for FWFT as well. Add a reset callback that can be
> implemented by SBI extensions.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_host.h | 1 -
> arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 ++
> arch/riscv/kvm/vcpu.c | 2 +-
> arch/riscv/kvm/vcpu_sbi.c | 24 ++++++++++++++++++++++++
> arch/riscv/kvm/vcpu_sbi_sta.c | 3 ++-
> 5 files changed, 29 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index 0e9c2fab6378..4fa02e082142 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -407,7 +407,6 @@ void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
> void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
> bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu);
>
> -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu);
> void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu);
>
> #endif /* __RISCV_KVM_HOST_H__ */
> diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> index bcb90757b149..cb68b3a57c8f 100644
> --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> @@ -57,6 +57,7 @@ struct kvm_vcpu_sbi_extension {
> */
> int (*init)(struct kvm_vcpu *vcpu);
> void (*deinit)(struct kvm_vcpu *vcpu);
> + void (*reset)(struct kvm_vcpu *vcpu);
> };
>
> void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run);
> @@ -78,6 +79,7 @@ bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx);
> int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
> void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu);
> void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu);
> +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu);
>
> int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num,
> unsigned long *reg_val);
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 877bcc85c067..542747e2c7f5 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -94,7 +94,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
> vcpu->arch.hfence_tail = 0;
> memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue));
>
> - kvm_riscv_vcpu_sbi_sta_reset(vcpu);
> + kvm_riscv_vcpu_sbi_reset(vcpu);
>
> /* Reset the guest CSRs for hotplug usecase */
> if (loaded)
> diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> index 3139f171c20f..50be079b5528 100644
> --- a/arch/riscv/kvm/vcpu_sbi.c
> +++ b/arch/riscv/kvm/vcpu_sbi.c
> @@ -536,3 +536,27 @@ void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu)
> ext->deinit(vcpu);
> }
> }
> +
> +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context;
> + const struct kvm_riscv_sbi_extension_entry *entry;
> + const struct kvm_vcpu_sbi_extension *ext;
> + int idx, i;
> +
> + for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) {
> + entry = &sbi_ext[i];
> + ext = entry->ext_ptr;
> + idx = entry->ext_idx;
> +
> + if (idx < 0 || idx >= ARRAY_SIZE(scontext->ext_status))
> + continue;
> +
> + if (scontext->ext_status[idx] != KVM_RISCV_SBI_EXT_STATUS_ENABLED ||
> + !ext->reset)
> + continue;
> +
> + ext->reset(vcpu);
> + }
> +}
> +
> diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c
> index 5f35427114c1..cc6cb7c8f0e4 100644
> --- a/arch/riscv/kvm/vcpu_sbi_sta.c
> +++ b/arch/riscv/kvm/vcpu_sbi_sta.c
> @@ -16,7 +16,7 @@
> #include <asm/sbi.h>
> #include <asm/uaccess.h>
>
> -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu)
> +static void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu)
> {
> vcpu->arch.sta.shmem = INVALID_GPA;
> vcpu->arch.sta.last_steal = 0;
> @@ -156,6 +156,7 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = {
> .extid_end = SBI_EXT_STA,
> .handler = kvm_sbi_ext_sta_handler,
> .probe = kvm_sbi_ext_sta_probe,
> + .reset = kvm_riscv_vcpu_sbi_sta_reset,
> };
>
> int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu,
LGTM.
Reviewed-by: Atish Patra <atishp@rivosinc.com>
next prev parent reply other threads:[~2025-05-09 0:28 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-24 17:31 [PATCH v6 00/14] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-04-24 17:31 ` [PATCH v6 01/14] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-05-08 20:17 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 02/14] riscv: sbi: remove useless parenthesis Clément Léger
2025-04-25 7:46 ` Andrew Jones
2025-05-08 20:18 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 03/14] riscv: sbi: add new SBI error mappings Clément Léger
2025-05-08 20:18 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 04/14] riscv: sbi: add FWFT extension interface Clément Léger
2025-05-08 22:52 ` Atish Patra
2025-05-09 0:18 ` Atish Patra
2025-05-12 8:14 ` Clément Léger
2025-05-12 18:00 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 05/14] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-05-08 23:01 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 06/14] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-04-24 17:31 ` [PATCH v6 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-04-24 17:31 ` [PATCH v6 08/14] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-04-24 17:31 ` [PATCH v6 09/14] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-04-24 17:31 ` [PATCH v6 10/14] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-04-24 18:18 ` ALOK TIWARI
2025-04-24 17:31 ` [PATCH v6 11/14] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-05-08 17:27 ` Palmer Dabbelt
2025-05-09 3:20 ` Anup Patel
2025-05-09 0:26 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 12/14] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-05-09 0:28 ` Atish Patra [this message]
2025-04-24 17:32 ` [PATCH v6 13/14] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-05-09 18:49 ` Atish Patra
2025-04-24 17:32 ` [PATCH v6 14/14] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-05-09 18:09 ` Atish Patra
2025-05-12 8:28 ` Clément Léger
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