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Especially if it i= s > a complicated feature like, SNP, for example, which needs fw and platform= to > be configured properly and so on. >=20 >> And because that utility is not available by default on most targets I c= are >> about, and having to build and copy over a binary is annoying (though th= is >> is a minor gripe). >=20 > I'm keeping that thing as simple as possible on purpose. So if you wanna = make > it available on such targets, I'm all ears. > =20 >> That said, what I really want in most cases is to know if _KVM_ supports >> a feature. I'll think more on this, I have a few vague ideas for gettin= g >> a pile of information out of KVM without needing to add more uABI. >=20 > That's exactly my pet peeve - making it a uABI and then supporting it for= eva. >=20 > We have tried to explain what cpuinfo should be: >=20 > Documentation/arch/x86/cpuinfo.rst >=20 > The gist of it is: >=20 > "So, the current use of /proc/cpuinfo is to show features which the kerne= l has > *enabled* and *supports*. As in: the CPUID feature flag is there, there's= an > additional setup which the kernel has done while booting and the function= ality > is ready to use. A perfect example for that is "user_shstk" where additio= nal > code enablement is present in the kernel to support shadow stack for user > programs." >=20 > So if it is something that has been enabled and is actively supported, th= en > sure, ofc. What I don't want to have there is a partial mirror of every > possible CPUID flag which is going to be a senseless and useless madness. >=20 > Dunno, I guess if we had a >=20 > "virt: ..." >=20 > line in /proc/cpuinfo which has flags of what the hypervisor has enabled = as > a feature, it might not be such a wrong idea... with the above caveats, o= fc. > I don't think you want a flurry of patches setting all possible flags jus= t > because. >=20 > Or maybe somewhere else where you can query it conveniently... >=20 I came up with this patch. Does it look okay? diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufe= ature.h index 0b9611da6c53..74c52bfd8cf2 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -41,6 +41,7 @@ enum cpuid_leafs #define x86_cap_flag_num(flag) ((flag) >> 5), ((flag) & 31) =20 extern const char * const x86_cap_flags[NCAPINTS*32]; +extern const char * const x86_virt_flags[NCAPINTS*32]; extern const char * const x86_power_flags[32]; #define X86_CAP_FMT "%s" #define x86_cap_flag(flag) x86_cap_flags[flag] diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index 734940fdb6c1..20f389ee0079 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -382,7 +382,7 @@ #define X86_FEATURE_V_SPEC_CTRL (15*32+20) /* "v_spec_ctrl" Virtual SPEC_= CTRL */ #define X86_FEATURE_VNMI (15*32+25) /* "vnmi" Virtual NMI */ #define X86_FEATURE_SVME_ADDR_CHK (15*32+28) /* SVME addr check */ -#define X86_FEATURE_BUS_LOCK_THRESHOLD (15*32+29) /* "" Bus lock threshold= */ +#define X86_VIRT_FEATURE_BUS_LOCK_THRESHOLD (15*32+29) /* "buslock" Bus lo= ck threshold */ =20 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */ #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* "avx512vbmi" AVX512 Vector B= it Manipulation instructions*/ diff --git a/arch/x86/kernel/cpu/mkcapflags.sh b/arch/x86/kernel/cpu/mkcapf= lags.sh index 68f537347466..3671c7892c56 100644 --- a/arch/x86/kernel/cpu/mkcapflags.sh +++ b/arch/x86/kernel/cpu/mkcapflags.sh @@ -62,6 +62,9 @@ trap 'rm "$OUT"' EXIT dump_array "x86_bug_flags" "NBUGINTS*32" "X86_BUG_" "NCAPINTS*32" $2 echo "" =20 + dump_array "x86_virt_flags" "NCAPINTS*32" "X86_VIRT_FEATURE_" "" $2 + echo "" + echo "#ifdef CONFIG_X86_VMX_FEATURE_NAMES" echo "#ifndef _ASM_X86_VMXFEATURES_H" echo "#include " diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c index e65fae63660e..3068b0a110e4 100644 --- a/arch/x86/kernel/cpu/proc.c +++ b/arch/x86/kernel/cpu/proc.c @@ -103,6 +103,11 @@ static int show_cpuinfo(struct seq_file *m, void *v) if (cpu_has(c, i) && x86_cap_flags[i] !=3D NULL) seq_printf(m, " %s", x86_cap_flags[i]); =20 + seq_puts(m, "\nvirt\t\t:"); + for (i =3D 0; i < 32*NCAPINTS; i++) + if (cpu_has(c, i) && x86_virt_flags[i] !=3D NULL) + seq_printf(m, " %s", x86_virt_flags[i]); + #ifdef CONFIG_X86_VMX_FEATURE_NAMES if (cpu_has(c, X86_FEATURE_VMX) && c->vmx_capability[0]) { seq_puts(m, "\nvmx flags\t:"); Output for this patch from /proc/cpuinfo looks like below: flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca = cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe= 1gb rdtscp lm constant_tsc rep_good amd_lbr_v2 nopl xtopology nonstop_tsc c= puid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 pcid = sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_leg= acy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ski= nit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb ca= t_l3 cdp_l3 hw_pstate ssbd mba perfmon_v2 ibrs ibpb stibp vmmcall fsgsbase = tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a avx512f avx512dq rdse= ed adx smap avx512ifma clflushopt clwb avx512cd sha_ni avx512bw avx512vl xs= aveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_lo= cal avx_vnni avx512_bf16 clzero irperf xsaveerptr rdpru wbnoinvd amd_ppin c= ppc arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decod= eassists pausefilter pfthreshold avic v_vmsave_vmload vgif x2avic v_spec_ct= rl vnmi avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_= vnni avx512_bitalg avx512_vpopcntdq la57 rdpid movdiri movdir64b overflow_r= ecov succor smca fsrm avx512_vp2intersect flush_l1d sev sev_es sev_snp debu= g_swap amd_lbr_pmc_freeze virt : buslock bugs : sysret_ss_attrs spectre_v1 spectre_v2 spec_store_bypass - Manali