From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76DB6C433F5 for ; Thu, 27 Jan 2022 18:34:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233376AbiA0SeT (ORCPT ); Thu, 27 Jan 2022 13:34:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232362AbiA0SeS (ORCPT ); Thu, 27 Jan 2022 13:34:18 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF6BEC061714 for ; Thu, 27 Jan 2022 10:34:17 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 71B42B801BD for ; Thu, 27 Jan 2022 18:34:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3EFEAC340E4; Thu, 27 Jan 2022 18:34:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643308455; bh=lZB6K5zcYeJPwQ6/f4YwG4MPqn0/eM8uiY9oUuQOpqA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=sbQPtD9mEGaKYsj/AH/xL2NKKH26KqFEbwKU6l/pcYvG+1G52HVFdPs7mEOz+aBjm oyA72B4FBBv6WDIC8yak/qau6W4fGIGYsl4eNJLwMhXM4qD4w02mbddgVHkJmuWglJ S7Ab+rlgDtmjIAZT45maRYh4piQAMSQFeGIlzDWXbJqjcg34P/FFXxo7fhHR0shyYv WSk1x8JlACpb/irf/wI+XdcNQcGzXeeEcCLLQtBDE3LeFWR6m3xuHM9QZHVzod2YBx cCzbVqUyrW/VKwRqIAGYhUjW3lhkneohsEWXtdMxJ4AhqmPkr63qX7+mdmfiWGzBMn /hgh2MKBsW5BQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nD9b3-003bFN-BO; Thu, 27 Jan 2022 18:34:13 +0000 Date: Thu, 27 Jan 2022 18:34:12 +0000 Message-ID: <87sft958pn.wl-maz@kernel.org> From: Marc Zyngier To: James Morse Cc: linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, Catalin Marinas , Will Deacon , Shuah Khan , Mark Brown Subject: Re: [PATCH 3/3] arm64: insn: Generate 64 bit mask immediates correctly In-Reply-To: <20220127162127.2391947-4-james.morse@arm.com> References: <20220127162127.2391947-1-james.morse@arm.com> <20220127162127.2391947-4-james.morse@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: james.morse@arm.com, linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, shuah@kernel.org, broonie@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org On Thu, 27 Jan 2022 16:21:27 +0000, James Morse wrote: > > When the insn framework is used to encode an AND/ORR/EOR instruction, > aarch64_encode_immediate() is used to pick the immr imms values. > > If the immediate is a 64bit mask, with bit 63 set, and zeros in any > of the upper 32 bits, the immr value is incorrectly calculated meaning > the wrong mask is generated. > For example, 0x8000000000000001 should have an immr of 1, but 32 is used, > meaning the resulting mask is 0x0000000300000000. > > It would appear eBPF is unable to hit these cases, as build_insn()'s > imm value is a s32, so when used with BPF_ALU64, the sign-extended > u64 immediate would always have all-1s or all-0s in the upper 32 bits. > > KVM does not generate a va_mask with any of the top bits set as these > VA wouldn't be usable with TTBR0_EL2. > > This happens because the rotation is calculated from fls(~imm), which > takes an unsigned int, but the immediate may be 64bit. > > Use fls64() so the 64bit mask doesn't get truncated to a u32. > > Signed-off-by: James Morse > --- > arch/arm64/lib/insn.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/lib/insn.c b/arch/arm64/lib/insn.c > index 8888e407032f..90253af7e294 100644 > --- a/arch/arm64/lib/insn.c > +++ b/arch/arm64/lib/insn.c > @@ -1381,7 +1381,7 @@ static u32 aarch64_encode_immediate(u64 imm, > * Compute the rotation to get a continuous set of > * ones, with the first bit set at position 0 > */ > - ror = fls(~imm); > + ror = fls64(~imm); > } > > /* Oh crap, not again... :-( Clearly, my initial test harness wasn't as good as I thought. Out for morbid curiosity, how was this found? Brown-paper-bag-for: Marc Zyngier Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.