From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3399CC433EF for ; Tue, 25 Jan 2022 13:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386650AbiAYNZO (ORCPT ); Tue, 25 Jan 2022 08:25:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1576439AbiAYNV4 (ORCPT ); Tue, 25 Jan 2022 08:21:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0BF4C06175E for ; Tue, 25 Jan 2022 05:21:52 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 971D8B81809 for ; Tue, 25 Jan 2022 13:21:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5232BC340E0; Tue, 25 Jan 2022 13:21:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643116910; bh=PJSTrk+R1poXRn4sn0sZB3L5b27X4yB/DBsC0W/v5Gs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=f8Mi5y/sOWXB2D+hVkXAVFAepBES3Pglmoql9JFmt2ddSG51oDufSjV41HCplZxPY ERty2wwWwaQnD6r2kzY5u4E1usdIix5W5JOGkriJVhCZLY05f1HGx18RjBI/SJ4v6c SPjII1DxkP7pABZoBKxRb9j+j+rMH/Hh0gjekJty5K/LtFmBAO6TBq1TFOOuTaCbGa bNvz0gb3PGmdBeQNCn/iUvuo5MIkdcyiEuUm5a1ccC2+Uz+InGYB32U5DSPDxTv8jJ +RpwWB1u8o6srB4ERBT5MuN4uPs9AEaZQFRVdrTJl5kCLsIf+JQBjJY2k7+h88PJEj TZMXWYm3fOwKg== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nCLlc-002ud5-B9; Tue, 25 Jan 2022 13:21:48 +0000 Date: Tue, 25 Jan 2022 13:21:47 +0000 Message-ID: <87v8y86jdg.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Catalin Marinas , Will Deacon , Shuah Khan , Shuah Khan , Alan Hayward , Luis Machado , Salil Akerkar , Basant Kumar Dwivedi , Szabolcs Nagy , James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, kvmarm@lists.cs.columbia.edu Subject: Re: [PATCH v8 25/38] KVM: arm64: Trap SME usage in guest In-Reply-To: References: <20220125001114.193425-1-broonie@kernel.org> <20220125001114.193425-26-broonie@kernel.org> <87y2346on8.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, catalin.marinas@arm.com, will@kernel.org, skhan@linuxfoundation.org, shuah@kernel.org, alan.hayward@arm.com, luis.machado@arm.com, Salil.Akerkar@arm.com, Basant.KumarDwivedi@arm.com, szabolcs.nagy@arm.com, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, kvmarm@lists.cs.columbia.edu X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org On Tue, 25 Jan 2022 12:25:47 +0000, Mark Brown wrote: > > [1 ] > On Tue, Jan 25, 2022 at 11:27:55AM +0000, Marc Zyngier wrote: > > Mark Brown wrote: > > > > + if (IS_ENABLED(CONFIG_ARM64_SME) && cpus_have_final_cap(ARM64_SME)) > > > Please drop the IS_ENABLED(). We purposely avoid conditional > > compilation in KVM in order to avoid bitrot, and the amount of code > > you save isn't significant. Having a static key is more than enough to > > avoid runtime costs. > > Sure, I wanted to be extra careful here as this is all in hot paths and > going to get moved elsewhere when we have real guest support. > > > > + if (IS_ENABLED(CONFIG_ARM64_SME) && cpus_have_final_cap(ARM64_SME) && > > > + cpus_have_final_cap(ARM64_HAS_FGT)) { > > > + val = read_sysreg_s(SYS_HFGRTR_EL2); > > > + val &= ~(HFGxTR_EL2_nTPIDR_EL0_MASK | > > > + HFGxTR_EL2_nSMPRI_EL1_MASK); > > > + write_sysreg_s(val, SYS_HFGRTR_EL2); > > > + > > > + val = read_sysreg_s(SYS_HFGWTR_EL2); > > > + val &= ~(HFGxTR_EL2_nTPIDR_EL0_MASK | > > > + HFGxTR_EL2_nSMPRI_EL1_MASK); > > > + write_sysreg_s(val, SYS_HFGWTR_EL2); > > > + } > > > If the CPUs do not have FGT, what provides the equivalent trapping? > > Nothing for nVHE mode. That's what I feared. > > > If FGT is mandatory when SME exists, then you should simplify the > > condition. > > OK, I'll remove the defensiveness here. FGT is mandatory from v8.6 and > SME is a v9 feature so people shouldn't build a SME implementation that > lacks FGT. Can you then please make it that SME doesn't get enabled at all if FGT isn't present? It would also be good to have a clarification in the architecture that it isn't allowed to build SME without FGT (specially given that v9.0 is congruent to v8.5, and thus doesn't have FGT). Thanks, M. -- Without deviation from the norm, progress is not possible.