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AJvYcCVMjXWcdo2nn3gRIRMDz8w8FPykpLs4gKSUsEbnjv2Vs+KbMDYl5fk+MH7UWqOzNNB+3/ZUDeD+YkQUsjMLHvY=@vger.kernel.org X-Gm-Message-State: AOJu0YycJWWZRnD4c6Qb/vvmSp0iWI5mkw1OVKdRsN9HDnmNx3HSAwV9 hra0eRqTnN6YND7iAmXM2+HWGeoV2f0TzTkrOf3jF+PNgBZAPpU74LUcS/ccVD8JM43F9NLc0e8 dJXSgExyk+6VD1eSph0lCRs4gwCPoc8jQDFFI8Y1UJA== X-Gm-Gg: ASbGncvw+AWPVboGxEYfk1t3adHlQaYVMO1MUnf4xqtqtTz4zH1/bShgloKKdoeczbW wJOrROi3vb7dmUY5rtA7RqQAUEQwlzVXdJ/H86AvZFoPeYbfo87vWcEHYbWBARcuylX1Sj0iWOZ W7JMc5MLFpZcAqg1b3soTAEwOb9zZ6RdDGdZThLaUrcpd0tAPvYu/sC5CKIju1LmuiGNfIn7u/s msgOa27 X-Google-Smtp-Source: AGHT+IGn5vdUvXU42asTYKNQVZYOTWSFQylr/vzhKnTrBq4lq3wiMD7MVYIp2kAGpgvKTA1X/43JEESbQNKODDhNtrQ= X-Received: by 2002:a05:6122:2502:b0:539:27eb:ca76 with SMTP id 71dfb90a1353d-53c8a2ea9admr1107586e0c.5.1755885598348; Fri, 22 Aug 2025 10:59:58 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250822174715.1269138-1-jesse@rivosinc.com> In-Reply-To: <20250822174715.1269138-1-jesse@rivosinc.com> From: Jesse Taube Date: Fri, 22 Aug 2025 10:59:47 -0700 X-Gm-Features: Ac12FXx85Q9pdAS3tmJucpDWbmumN5hD5YReh0RpBOKeYl8mPi6vXHz7zLBXbxM Message-ID: Subject: Re: [PATCH 0/8] riscv: add initial support for hardware breakpoints To: linux-riscv@lists.infradead.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Kees Cook , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Liang Kan , Shuah Khan , Himanshu Chauhan , Charlie Jenkins , Samuel Holland , Conor Dooley , Deepak Gupta , Andrew Jones , Atish Patra , Anup Patel , Mayuresh Chitale , Evan Green , WangYuli , Huacai Chen , Arnd Bergmann , Andrew Morton , Luis Chamberlain , "Mike Rapoport (Microsoft)" , Nam Cao , Yunhui Cui , Joel Granados , =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= , Sebastian Andrzej Siewior , Celeste Liu , Chunyan Zhang , Nylon Chen , Thomas Gleixner , =?UTF-8?Q?Thomas_Wei=C3=9Fschuh?= , Vincenzo Frascino , Joey Gouly , Ravi Bangoria , linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org, Joel Stanley Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Aug 22, 2025 at 10:47=E2=80=AFAM Jesse Taube w= rote: > > This patchset adds initial support for hardware breakpoints and > watchpoints to the RISC-V architecture. The framework is built on > top of perf subsystem and SBI debug trigger extension. > > Currently following features are not supported and are in works: > - icount for single stepping > - Virtualization of debug triggers > - kernel space debug triggers > > The SBI debug trigger extension can be found at: > https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/src/ext-debug-= triggers.adoc > > The Sdtrig ISA is part of RISC-V debug specification which can be > found at: > https://github.com/riscv/riscv-debug-spec > > based off the original RFC by Himanshu Chauhan here: > https://lore.kernel.org/lkml/20240222125059.13331-1-hchauhan@ventanamicro= .com/ > > Second RFC by Jesse Taube here: > https://lore.kernel.org/lkml/20250722173829.984082-1-jesse@rivosinc.com/ > > Himanshu Chauhan (2): > riscv: Add SBI debug trigger extension and function ids > riscv: Introduce support for hardware break/watchpoints > > Jesse Taube (6): > riscv: Add insn.c, consolidate instruction decoding > riscv: insn: Add get_insn_nofault > riscv: hw_breakpoint: Use icount for single stepping > riscv: ptrace: Add hw breakpoint support > riscv: ptrace: Add hw breakpoint regset > selftests: riscv: Add test for hardware breakpoints > > arch/riscv/Kconfig | 2 + > arch/riscv/include/asm/bug.h | 12 - > arch/riscv/include/asm/hw_breakpoint.h | 59 ++ > arch/riscv/include/asm/insn.h | 132 ++- > arch/riscv/include/asm/kdebug.h | 3 +- > arch/riscv/include/asm/processor.h | 4 + > arch/riscv/include/asm/sbi.h | 33 +- > arch/riscv/include/uapi/asm/ptrace.h | 9 + > arch/riscv/kernel/Makefile | 2 + > arch/riscv/kernel/hw_breakpoint.c | 763 ++++++++++++++++++ > arch/riscv/kernel/insn.c | 165 ++++ > arch/riscv/kernel/kgdb.c | 102 +-- > arch/riscv/kernel/probes/kprobes.c | 1 + > arch/riscv/kernel/process.c | 4 + > arch/riscv/kernel/ptrace.c | 169 ++++ > arch/riscv/kernel/traps.c | 11 +- > arch/riscv/kernel/traps_misaligned.c | 93 +-- > include/uapi/linux/elf.h | 2 + > tools/include/uapi/linux/elf.h | 1 + > tools/perf/tests/tests.h | 3 +- > tools/testing/selftests/riscv/Makefile | 2 +- > .../selftests/riscv/breakpoints/.gitignore | 1 + > .../selftests/riscv/breakpoints/Makefile | 13 + > .../riscv/breakpoints/breakpoint_test.c | 246 ++++++ > 24 files changed, 1641 insertions(+), 191 deletions(-) > create mode 100644 arch/riscv/include/asm/hw_breakpoint.h > create mode 100644 arch/riscv/kernel/hw_breakpoint.c > create mode 100644 arch/riscv/kernel/insn.c > create mode 100644 tools/testing/selftests/riscv/breakpoints/.gitignore > create mode 100644 tools/testing/selftests/riscv/breakpoints/Makefile > create mode 100644 tools/testing/selftests/riscv/breakpoints/breakpoint_= test.c > > -- > 2.43.0 > Oops, this meant to be V2. Thanks, Jesse Taube