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Date:   Mon, 21 Feb 2022 11:54:32 +0000
From:   Catalin Marinas <catalin.marinas@arm.com>
To:     Mark Brown <broonie@kernel.org>
Cc:     Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
        Shuah Khan <skhan@linuxfoundation.org>,
        Shuah Khan <shuah@kernel.org>,
        Alan Hayward <alan.hayward@arm.com>,
        Luis Machado <luis.machado@arm.com>,
        Salil Akerkar <Salil.Akerkar@arm.com>,
        Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
        Szabolcs Nagy <szabolcs.nagy@arm.com>,
        James Morse <james.morse@arm.com>,
        Alexandru Elisei <alexandru.elisei@arm.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        linux-arm-kernel@lists.infradead.org,
        linux-kselftest@vger.kernel.org, kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v11 09/40] arm64/sme: Early CPU setup for SME
Message-ID: <YhN9eAb7hpYzYYqI@arm.com>
References: <20220207152109.197566-1-broonie@kernel.org>
 <20220207152109.197566-10-broonie@kernel.org>
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On Mon, Feb 07, 2022 at 03:20:38PM +0000, Mark Brown wrote:
> SME requires similar setup to that for SVE: disable traps to EL2 and
> make sure that the maximum vector length is available to EL1, for SME we
> have two traps - one for SME itself and one for TPIDR2.
> 
> In addition since we currently make no active use of priority control
> for SCMUs we map all SME priorities lower ELs may configure to 0, the
> architecture specified minimum priority, to ensure that nothing we
> manage is able to configure itself to consume excessive resources.  This
> will need to be revisited should there be a need to manage SME
> priorities at runtime.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>