From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>,
Shuah Khan <skhan@linuxfoundation.org>,
Shuah Khan <shuah@kernel.org>,
Alan Hayward <alan.hayward@arm.com>,
Luis Machado <luis.machado@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v4 3/4] arm64/ptrace: Support access to TPIDR2_EL0
Date: Fri, 16 Sep 2022 13:01:31 +0100 [thread overview]
Message-ID: <YyRlm/koy30sze9Z@arm.com> (raw)
In-Reply-To: <20220829154921.837871-4-broonie@kernel.org>
On Mon, Aug 29, 2022 at 04:49:20PM +0100, Mark Brown wrote:
> @@ -1392,7 +1407,7 @@ static const struct user_regset aarch64_regsets[] = {
> },
> [REGSET_TLS] = {
> .core_note_type = NT_ARM_TLS,
> - .n = 1,
> + .n = 2,
> .size = sizeof(void *),
> .align = sizeof(void *),
> .regset_get = tls_get,
Does this change confuse user-space? I presume an updated gdb would
check the iov.len to figure out whether a new register is available but
would existing debuggers complain of the new size of this regset?
--
Catalin
next prev parent reply other threads:[~2022-09-16 12:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-29 15:49 [PATCH v4 0/4] arm64/sme: ptrace support for TPIDR2_EL0 Mark Brown
2022-08-29 15:49 ` [PATCH v4 1/4] kselftest/arm64: Add test coverage for NT_ARM_TLS Mark Brown
2022-08-29 15:49 ` [PATCH v4 2/4] arm64/ptrace: Document extension of NT_ARM_TLS to cover TPIDR2_EL0 Mark Brown
2022-08-29 15:49 ` [PATCH v4 3/4] arm64/ptrace: Support access to TPIDR2_EL0 Mark Brown
2022-09-16 12:01 ` Catalin Marinas [this message]
2022-09-19 12:43 ` Mark Brown
2022-09-22 11:15 ` Luis Machado
2022-09-22 13:57 ` Catalin Marinas
2022-08-29 15:49 ` [PATCH v4 4/4] kselftest/arm64: Add coverage of TPIDR2_EL0 ptrace interface Mark Brown
2022-09-21 17:19 ` [PATCH v4 0/4] arm64/sme: ptrace support for TPIDR2_EL0 Catalin Marinas
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