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[142.68.25.194]) by smtp.gmail.com with ESMTPSA id l5-20020a0ce085000000b0062439f05b87sm10534957qvk.45.2023.06.19.05.58.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 05:58:17 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1qBESX-006pH5-Bv; Mon, 19 Jun 2023 09:58:17 -0300 Date: Mon, 19 Jun 2023 09:58:17 -0300 From: Jason Gunthorpe To: Jean-Philippe Brucker Cc: Lu Baolu , Kevin Tian , Joerg Roedel , Will Deacon , Robin Murphy , Nicolin Chen , Yi Liu , Jacob Pan , iommu@lists.linux.dev, linux-kselftest@vger.kernel.org, virtualization@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCHES 00/17] IOMMUFD: Deliver IO page faults to user space Message-ID: References: <20230530053724.232765-1-baolu.lu@linux.intel.com> <20230616113232.GA84678@myrica> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230616113232.GA84678@myrica> Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org On Fri, Jun 16, 2023 at 12:32:32PM +0100, Jean-Philippe Brucker wrote: > We might need to revisit supporting stop markers: request that each device > driver declares whether their device uses stop markers on unbind() ("This > mechanism must indicate that a Stop Marker Message will be generated." > says the spec, but doesn't say if the function always uses one or the > other mechanism so it's per-unbind). Then we still have to synchronize > unbind() with the fault handler to deal with the pending stop marker, > which might have already gone through or be generated later. An explicit API to wait for the stop marker makes sense, with the expectation that well behaved devices will generate it and well behaved drivers will wait for it. Things like VFIO should have a way to barrier/drain the PRI queue after issuing FLR. ie the VMM processing FLR should also barrier the real HW queues and flush them to VM visibility. > with stop markers, the host needs to flush the PRI queue when a PASID is > detached. I guess on Intel detaching the PASID goes through the host which > can flush the host queue. On Arm we'll probably need to flush the queue > when receiving a PASID cache invalidation, which the guest issues after > clearing a PASID table entry. We are trying to get ARM to a point where invalidations don't need to be trapped. It would be good to not rely on that anyplace. Jason