From: Deepak Gupta <debug@rivosinc.com>
To: "Radim Krčmář" <rkrcmar@ventanamicro.com>
Cc: "Alexandre Ghiti" <alex@ghiti.fr>,
"Thomas Gleixner" <tglx@linutronix.de>,
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"Zong Li" <zong.li@sifive.com>,
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Subject: Re: [PATCH v15 05/27] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit
Date: Fri, 16 May 2025 08:34:25 -0700 [thread overview]
Message-ID: <aCdbASlCyqhid82c@debug.ba.rivosinc.com> (raw)
In-Reply-To: <D9WLRSAB63M5.3DZD4ND3WVZ6F@ventanamicro.com>
On Thu, May 15, 2025 at 10:48:35AM +0200, Radim Krčmář wrote:
>2025-05-15T09:28:25+02:00, Alexandre Ghiti <alex@ghiti.fr>:
>> On 06/05/2025 12:10, Radim Krčmář wrote:
>>> 2025-05-02T16:30:36-07:00, Deepak Gupta <debug@rivosinc.com>:
>>>> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
>>>> @@ -91,6 +91,32 @@
>>>> +.macro restore_userssp tmp
>>>> + ALTERNATIVE("nops(2)",
>>>> + __stringify( \
>>>> + REG_L \tmp, TASK_TI_USER_SSP(tp); \
>>>> + csrw CSR_SSP, \tmp),
>>>> + 0,
>>>> + RISCV_ISA_EXT_ZICFISS,
>>>> + CONFIG_RISCV_USER_CFI)
>>>> +.endm
>>> Do we need to emit the nops when CONFIG_RISCV_USER_CFI isn't selected?
>>>
>>> (Why not put #ifdef CONFIG_RISCV_USER_CFI around the ALTERNATIVES?)
>>
>> The alternatives are used to create a generic kernel that contains the
>> code for a large number of extensions and only enable it at runtime
>> depending on the platform capabilities. This way distros can ship a
>> single kernel that works on all platforms.
>
>Yup, and if a kernel is compiled without CONFIG_RISCV_USER_CFI, the nops
>will only enlarge the binary and potentially slow down execution.
>In other words, why we don't do something like this
>
> (!CONFIG_RISCV_USER_CFI ? "" :
> (RISCV_ISA_EXT_ZICFISS ? __stringify(...) : "nops(x)"))
>
>instead of the current
>
> (CONFIG_RISCV_USER_CFI &&
> RISCV_ISA_EXT_ZICFISS ? __stringify(...) : "nops(x)")
>
>It could be a new preprocessor macro in case we wanted to make it nice,
>but it's probably not a common case, so an ifdef could work as well.
>
>Do we just generally not care about such minor optimizations?
On its own just for this series, I am not sure if I would call it even a
minor optimization.
But sure, it may (or may not) have noticeable effect if someone were
to go around and muck with ALTERNATIVES macro and emit `old_c` only
if config were selected. That should be a patch set on its own with
data providing benefits from it.
>
>(If we wanted to go an extra mile, we could also keep the nops when both
> CONFIG_RISCV_USER_CFI and RISCV_ISA_EXT_ZICFISS are present, but
> command line riscv_nousercfi disabled backward cfi.)
>
>Thanks.
next prev parent reply other threads:[~2025-05-16 15:34 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-02 23:30 [PATCH v15 00/27] riscv control-flow integrity for usermode Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 01/27] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta
2025-05-20 9:15 ` David Hildenbrand
2025-05-02 23:30 ` [PATCH v15 02/27] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 03/27] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 04/27] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 05/27] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2025-05-06 10:10 ` Radim Krčmář
2025-05-15 7:28 ` Alexandre Ghiti
2025-05-15 8:48 ` Radim Krčmář
2025-05-16 15:34 ` Deepak Gupta [this message]
2025-05-19 12:39 ` Radim Krčmář
2025-05-02 23:30 ` [PATCH v15 06/27] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 07/27] riscv mm: manufacture shadow stack pte Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 08/27] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 09/27] riscv mmu: write protect and shadow stack Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 10/27] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 11/27] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 12/27] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 13/27] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 14/27] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 15/27] riscv/traps: Introduce software check exception Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 16/27] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 17/27] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 18/27] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 19/27] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 20/27] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 21/27] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 22/27] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2025-05-15 7:10 ` Alexandre Ghiti
2025-05-16 15:16 ` Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 23/27] arch/riscv: compile vdso with landing pad Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 24/27] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 25/27] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 26/27] riscv: Documentation for shadow stack on riscv Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 27/27] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2025-05-20 6:02 ` Charlie Jenkins
2025-05-20 23:49 ` Deepak Gupta
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