From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-187.mta1.migadu.com (out-187.mta1.migadu.com [95.215.58.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84A7438333B for ; Thu, 2 Jul 2026 06:15:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.187 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782972952; cv=none; b=MqQ0AjWSaRMfihp0r5fomP1iXQLYUuwBj5rw4EAUO3+SvLV4F4Ym8SbxJ91T+bdly0/9243IbuddPHWKJTazQ76935eVzieP27Zmewcurn3oIduTjmygDm7qc3nETCNhxVIENWpfe+fLCcLeseIlTM8O+2JIiHFwp3stzR20pKA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782972952; c=relaxed/simple; bh=gZataAktdZqFVOQNF9xTx4XhlvCz1HfP5FRQulEDopw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=oWT1sWoCHDmvVDhz7XrLpli5SnqYYRzLlYi+QC/lgZVnsgTvXg3XngCHWK/Zop4BodUP24Ax9fe6A0dwTSOmHaRmYwbOCdc/9y9UZHaDW74ZokhTDgMHapl+BbzZQWWwLsOu1nWSlQP3CcCIq3ITzg7OnIpCkxnGUFdGkOYW+84= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=xXTx/Fja; arc=none smtp.client-ip=95.215.58.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="xXTx/Fja" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1782972939; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uI8ueJO3T3j9lODHWCIaJNjGSGrgbiCEdlasJRUkOPI=; b=xXTx/FjabfNJXkzPXAZj4AElGy9w+AF0b4T/v6NN8HfY5JhlqOsb8k82jeqMoAvzaD5QHL A/89zeKn/7+jJJNh0ug3btdpQxgbsLeiKqTmQifGRBbPtm39KJxcj9ILFvWldDNBAJxTz2 qVppmoC9eDOo7KSwU1LJ91wkUM7vQ+0= Date: Thu, 2 Jul 2026 14:15:20 +0800 Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH bpf-next v8 2/9] bpf: Introduce global percpu data Content-Language: en-US To: Andrii Nakryiko Cc: bpf@vger.kernel.org, Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Kumar Kartikeya Dwivedi , Song Liu , Yonghong Song , Jiri Olsa , John Fastabend , Quentin Monnet , Shuah Khan , linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, kernel-patches-bot@fb.com References: <20260629152406.52582-1-leon.hwang@linux.dev> <20260629152406.52582-3-leon.hwang@linux.dev> X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Leon Hwang In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT On 2/7/26 03:31, Andrii Nakryiko wrote: > On Mon, Jun 29, 2026 at 8:24 AM Leon Hwang wrote: [...] >> diff --git a/kernel/bpf/fixups.c b/kernel/bpf/fixups.c >> index 3cf2cc6e3ab6..4f84d087ca69 100644 >> --- a/kernel/bpf/fixups.c >> +++ b/kernel/bpf/fixups.c >> @@ -1819,6 +1819,38 @@ int bpf_do_misc_fixups(struct bpf_verifier_env *env) >> goto next_insn; >> } >> >> + if (env->prog->jit_requested && >> + bpf_jit_supports_percpu_insn() && >> + insn->code == (BPF_LD | BPF_IMM | BPF_DW) && >> + (insn->src_reg == BPF_PSEUDO_MAP_VALUE || >> + insn->src_reg == BPF_PSEUDO_MAP_IDX_VALUE)) { >> + struct bpf_map *map; >> + >> + aux = &env->insn_aux_data[i + delta]; >> + map = env->used_maps[aux->map_index]; >> + if (map->map_type != BPF_MAP_TYPE_PERCPU_ARRAY) >> + goto next_insn; >> + >> + /* >> + * Reuse the original ld_imm64 insn, and add one >> + * mov64_percpu_reg insn. >> + */ >> + >> + insn_buf[0] = insn[1]; >> + insn_buf[1] = BPF_MOV64_PERCPU_REG(insn->dst_reg, insn->dst_reg); >> + cnt = 2; >> + >> + i++; > > oof, this was a subtle head scratcher for me.. that i++ is easy to > miss. let's update the comment to be more explicit: we are *skipping* > first half of ld_imm64, patching over second half of it with that same > half + percpu mov. All because bpf_patch_insn_data() can only replace > one 8-byte instruction, which doesn't work well for ldimm64. > > Anyways, this looks correct, it just took me a bit to figure this out > and while the above comment warned me about this, it didn't really > make it any easier for figure out what's going on. > Ack. Will update the comment. Thanks, Leon