From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: shuah@kernel.org, Dave.Martin@arm.com, james.morse@arm.com,
tony.luck@intel.com, babu.moger@amd.com, fenghuay@nvidia.com,
peternewman@google.com, zide.chen@intel.com,
dapeng1.mi@linux.intel.com, ben.horgan@arm.com,
yu.c.chen@intel.com, jason.zeng@intel.com,
linux-kselftest@vger.kernel.org,
LKML <linux-kernel@vger.kernel.org>,
patches@lists.linux.dev
Subject: Re: [PATCH v3 04/10] selftests/resctrl: Prepare for parsing multiple events per iMC
Date: Thu, 26 Mar 2026 15:03:51 +0200 (EET) [thread overview]
Message-ID: <cf4e456d-2573-3c11-17d5-8d410e3fc26a@linux.intel.com> (raw)
In-Reply-To: <dea5825ffde55254e8b37dfa1a1723854ec257ac.1773432891.git.reinette.chatre@intel.com>
[-- Attachment #1: Type: text/plain, Size: 3506 bytes --]
On Fri, 13 Mar 2026, Reinette Chatre wrote:
> The events needed to read memory bandwidth are discovered by iterating
> over every memory controller (iMC) within /sys/bus/event_source/devices.
> Each iMC's PMU is assumed to have one event to measure read memory
> bandwidth that is represented by the sysfs cas_count_read file. The event's
> configuration is read from "cas_count_read" and stored as an element of
> imc_counters_config[] by read_from_imc_dir() that receives the
> index of the array where to store the configuration as argument.
>
> It is possible that an iMC's PMU may have more than one event that should
> be used to measure memory bandwidth.
>
> Change semantics to not provide the index of the array to
> read_from_imc_dir() but instead a pointer to the index. This enables
> read_from_imc_dir() to store configurations for more than one event by
> incrementing the index to imc_counters_config[] itself.
>
> Ensure that the same type is consistently used for the index as it is
> passed around during counter configuration.
>
> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
> Tested-by: Chen Yu <yu.c.chen@intel.com>
> Reviewed-by: Zide Chen <zide.chen@intel.com>
> ---
> Changes since v1:
> - Add Zide Chen's RB tag.
>
> Changes since v2:
> - Add Chen Yu's tag.
> ---
> tools/testing/selftests/resctrl/resctrl_val.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c
> index 71d6f88cc1f7..6d766347e3fc 100644
> --- a/tools/testing/selftests/resctrl/resctrl_val.c
> +++ b/tools/testing/selftests/resctrl/resctrl_val.c
> @@ -73,7 +73,7 @@ static void read_mem_bw_ioctl_perf_event_ioc_disable(int i)
> * @cas_count_cfg: Config
> * @count: iMC number
> */
> -static void get_read_event_and_umask(char *cas_count_cfg, int count)
> +static void get_read_event_and_umask(char *cas_count_cfg, unsigned int count)
> {
> char *token[MAX_TOKENS];
> int i = 0;
> @@ -110,7 +110,7 @@ static int open_perf_read_event(int i, int cpu_no)
> }
>
> /* Get type and config of an iMC counter's read event. */
> -static int read_from_imc_dir(char *imc_dir, int count)
> +static int read_from_imc_dir(char *imc_dir, unsigned int *count)
> {
> char cas_count_cfg[1024], imc_counter_cfg[1024], imc_counter_type[1024];
> FILE *fp;
> @@ -123,7 +123,7 @@ static int read_from_imc_dir(char *imc_dir, int count)
>
> return -1;
> }
> - if (fscanf(fp, "%u", &imc_counters_config[count].type) <= 0) {
> + if (fscanf(fp, "%u", &imc_counters_config[*count].type) <= 0) {
> ksft_perror("Could not get iMC type");
> fclose(fp);
>
> @@ -147,7 +147,8 @@ static int read_from_imc_dir(char *imc_dir, int count)
> }
> fclose(fp);
>
> - get_read_event_and_umask(cas_count_cfg, count);
> + get_read_event_and_umask(cas_count_cfg, *count);
> + *count += 1;
>
> return 0;
> }
> @@ -196,13 +197,12 @@ static int num_of_imcs(void)
> if (temp[0] >= '0' && temp[0] <= '9') {
> sprintf(imc_dir, "%s/%s/", DYN_PMU_PATH,
> ep->d_name);
> - ret = read_from_imc_dir(imc_dir, count);
> + ret = read_from_imc_dir(imc_dir, &count);
> if (ret) {
> closedir(dp);
>
> return ret;
> }
> - count++;
> }
> }
> closedir(dp);
>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
next prev parent reply other threads:[~2026-03-26 13:04 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 20:32 [PATCH v3 00/10] selftests/resctrl: Fixes and improvements focused on Intel platforms Reinette Chatre
2026-03-13 20:32 ` [PATCH v3 01/10] selftests/resctrl: Improve accuracy of cache occupancy test Reinette Chatre
2026-03-26 12:44 ` Ilpo Järvinen
2026-03-13 20:32 ` [PATCH v3 02/10] selftests/resctrl: Reduce interference from L2 occupancy during " Reinette Chatre
2026-03-26 12:56 ` Ilpo Järvinen
2026-03-13 20:32 ` [PATCH v3 03/10] selftests/resctrl: Do not store iMC counter value in counter config structure Reinette Chatre
2026-03-13 20:32 ` [PATCH v3 04/10] selftests/resctrl: Prepare for parsing multiple events per iMC Reinette Chatre
2026-03-26 13:03 ` Ilpo Järvinen [this message]
2026-03-26 14:34 ` Reinette Chatre
2026-03-13 20:32 ` [PATCH v3 05/10] selftests/resctrl: Support multiple events associated with iMC Reinette Chatre
2026-03-27 17:28 ` Ilpo Järvinen
2026-03-13 20:32 ` [PATCH v3 06/10] selftests/resctrl: Increase size of buffer used in MBM and MBA tests Reinette Chatre
2026-03-27 17:30 ` Ilpo Järvinen
2026-03-13 20:32 ` [PATCH v3 07/10] selftests/resctrl: Raise threshold at which MBM and PMU values are compared Reinette Chatre
2026-03-27 17:34 ` Ilpo Järvinen
2026-03-27 23:19 ` Reinette Chatre
2026-03-13 20:32 ` [PATCH v3 08/10] selftests/resctrl: Remove requirement on cache miss rate Reinette Chatre
2026-03-27 17:45 ` Ilpo Järvinen
2026-03-27 23:21 ` Reinette Chatre
2026-03-31 8:07 ` Ilpo Järvinen
2026-03-31 17:39 ` Reinette Chatre
2026-03-13 20:32 ` [PATCH v3 09/10] selftests/resctrl: Simplify perf usage in CAT test Reinette Chatre
2026-03-27 17:47 ` Ilpo Järvinen
2026-03-13 20:32 ` [PATCH v3 10/10] selftests/resctrl: Reduce L2 impact on " Reinette Chatre
2026-03-27 17:49 ` Ilpo Järvinen
2026-03-27 23:22 ` Reinette Chatre
2026-03-31 19:13 ` [PATCH v3 00/10] selftests/resctrl: Fixes and improvements focused on Intel platforms Shuah Khan
2026-03-31 20:22 ` Reinette Chatre
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