From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Muhammad Usama Anjum <usama.anjum@collabora.com>,
Shuah Khan <shuah@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
Weihong Zhang <weihong.zhang@intel.com>,
Binbin Wu <binbin.wu@linux.intel.com>,
angquan yu <angquan21@gmail.com>
Cc: <kernel@collabora.com>, <linux-kselftest@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] selftests: x86: skip the tests if prerequisites aren't fulfilled
Date: Fri, 8 Mar 2024 17:06:29 -0800 [thread overview]
Message-ID: <dc8d122a-22b7-4d17-abd9-66262af0b058@intel.com> (raw)
In-Reply-To: <20240307183730.2858264-1-usama.anjum@collabora.com>
On 3/7/2024 10:37 AM, Muhammad Usama Anjum wrote:
>
> diff --git a/tools/testing/selftests/x86/amx.c b/tools/testing/selftests/x86/amx.c
> index d884fd69dd510..5d1ca0bbaaae7 100644
> --- a/tools/testing/selftests/x86/amx.c
> +++ b/tools/testing/selftests/x86/amx.c
> @@ -103,9 +103,10 @@ static void clearhandler(int sig)
>
> #define CPUID_LEAF1_ECX_XSAVE_MASK (1 << 26)
> #define CPUID_LEAF1_ECX_OSXSAVE_MASK (1 << 27)
> -static inline void check_cpuid_xsave(void)
> +static inline int check_cpuid_xsave(void)
> {
> uint32_t eax, ebx, ecx, edx;
> + int ret = 0;
>
> /*
> * CPUID.1:ECX.XSAVE[bit 26] enumerates general
> @@ -113,10 +114,16 @@ static inline void check_cpuid_xsave(void)
> * XGETBV.
> */
> __cpuid_count(1, 0, eax, ebx, ecx, edx);
> - if (!(ecx & CPUID_LEAF1_ECX_XSAVE_MASK))
> - fatal_error("cpuid: no CPU xsave support");
> - if (!(ecx & CPUID_LEAF1_ECX_OSXSAVE_MASK))
> - fatal_error("cpuid: no OS xsave support");
> + if (!(ecx & CPUID_LEAF1_ECX_XSAVE_MASK)) {
> + ksft_print_msg("cpuid: no CPU xsave support\n");
> + ret = -1;
> + }
> + if (!(ecx & CPUID_LEAF1_ECX_OSXSAVE_MASK)) {
> + ksft_print_msg("cpuid: no OS xsave support\n");
> + ret = -1;
> + }
> +
> + return ret;
> }
I thought check_cpuid_xsave() can go away [1] by simplifying the
availability check through arch_prctl():
+#define ARCH_GET_XCOMP_SUPP 0x1021
#define ARCH_GET_XCOMP_PERM 0x1022
#define ARCH_REQ_XCOMP_PERM 0x1023
@@ -928,8 +911,15 @@ static void test_ptrace(void)
int main(void)
{
- /* Check hardware availability at first */
- check_cpuid_xsave();
+ unsigned long features;
+ long rc;
+
+ rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_SUPP, &features);
+ if (rc || (features & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE) {
+ ksft_print_msg("no AMX support\n");
+ return KSFT_SKIP;
+ }
> -static void check_cpuid_xtiledata(void)
> +static int check_cpuid_xtiledata(void)
> {
> uint32_t eax, ebx, ecx, edx;
>
> @@ -153,12 +160,16 @@ static void check_cpuid_xtiledata(void)
> * eax: XTILEDATA state component size
> * ebx: XTILEDATA state component offset in user buffer
> */
> - if (!eax || !ebx)
> - fatal_error("xstate cpuid: invalid tile data size/offset: %d/%d",
> - eax, ebx);
> + if (!eax || !ebx) {
> + ksft_print_msg("xstate cpuid: invalid tile data size/offset: %d/%d\n",
> + eax, ebx);
> + return -1;
> + }
>
> xtiledata.size = eax;
> xtiledata.xbuf_offset = ebx;
> +
> + return 0;
> }
I don't think it is okay to silently skip the test here. If the feature
is available, the tile data size and offset should not be zero.
Thanks,
Chang
[1]
https://lore.kernel.org/lkml/327cde12-daea-84ba-4b24-64fe12e89dea@intel.com/
next prev parent reply other threads:[~2024-03-09 1:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-07 18:37 [PATCH] selftests: x86: skip the tests if prerequisites aren't fulfilled Muhammad Usama Anjum
2024-03-09 1:06 ` Chang S. Bae [this message]
2024-03-11 17:02 ` Muhammad Usama Anjum
2024-03-11 17:39 ` Chang S. Bae
2024-03-12 9:26 ` Muhammad Usama Anjum
2024-03-12 16:07 ` Chang S. Bae
2024-03-12 17:28 ` Muhammad Usama Anjum
2024-03-11 12:39 ` Kirill A. Shutemov
2024-03-12 0:10 ` Binbin Wu
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