From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 459B1261B8C; Wed, 5 Nov 2025 18:35:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762367736; cv=none; b=Yj+aKM5BK5i+yHYIpzB4eMOg/cz+95AazhtbO7a4pH141CpCDegLiIwav8nziC+vEPJheLj/SjNvFT51RPpak2e+0Ee+2EHByhKQIoERwj/kmj2Zdq8oXFDlpWIlr0RqG4Rx4t+/VtprpAHjX/NoklPcrZOwzrDDUIZ9DefZNvA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762367736; c=relaxed/simple; bh=vHDCXTaIfWhkhZfvI9HtlKPpn/+0+WZlcUbjNDsPP74=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=UFavwzltWhpbZJeXm7HEPzSsuMesb970nQiU0gGWUzw9cEIClF9PHchQr+0YdhX5uFL4d6XvwpBmkF2tb5tTUo+d1wk0hop9qpPnR3+19q+4G/YFMBFlRtO+EhU7qq3bTvszOy7c8Ny95EmCEIr9bLO0gvgpUFdW7mFJKhsyJcw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=DMWnxMtC; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="DMWnxMtC" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=gr+fuIZVMsvAB/4PFLwSP+MU9/cNRU8q+NVEIzxyzsc=; b=DMWnxMtCsq0D0tbGXds9Jlq92p 6kWZFYL/VDxkTLUcWlf5Sj2o2Bs/yoUqEZ863Xf8Vg7QITqHw2GD7+fZjG1g3z8NLUI9PgkTcaSdl u/J07eG9/5iviqz9saqGsvvrvioG32NJgerH5vSyX7Hgc6SLnXgw0IuotSFLcYOym8PE=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1vGiLy-00D1wa-KD; Wed, 05 Nov 2025 19:35:30 +0100 Date: Wed, 5 Nov 2025 19:35:30 +0100 From: Andrew Lunn To: "Lad, Prabhakar" Cc: Marek =?iso-8859-1?Q?Beh=FAn?= , linux-leds@vger.kernel.org, netdev@vger.kernel.org, Pavel Machek , Dan Murphy , Russell King , Matthias Schiffer , Jacek Anaszewski , Mauro Carvalho Chehab Subject: Re: [PATCH leds v2 00/10] Add support for offloading netdev trigger to HW + example implementation for Turris Omnia Message-ID: <7be43544-20fe-4471-9fe4-1c8f82ad56ef@lunn.ch> References: <7d510f5f-959c-49b7-afca-c02009898ef2@lunn.ch> <87875554-1747-4b0e-9805-aed1a4c69a82@lunn.ch> Precedence: bulk X-Mailing-List: linux-leds@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > # ls > brightness device device_name full_duplex half_duplex interval > link link_10 link_100 max_brightness offloaded power rx rx_err > subsystem trigger tx tx_err uevent > > As per HW manual [0] we have, > 0: Combine enabled (link/activity, duplex/collision). > 1: Disable combination (link only, duplex only). > > # Combine DISABLED (link + duplex only) > echo netdev > trigger > echo 1 > link > echo 1 > full_duplex # or half_duplex > echo 0 > rx > echo 0 > tx > > # Combine ENABLED (link + activity + duplex + collision) > echo netdev > trigger > echo 1 > link > echo 1 > rx > echo 1 > tx > > So to Enable/Disable LEDx combine feature we just need to write as > above. Is my understanding correct? Yes. The PHY driver gets passed a bitmap of each features to enable. Looking that those bits you need to decide on the 4 bit LED mode value, and the combine bit. Or return -EOPNOTSUPP. Andrew