From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFA77253F13; Wed, 5 Nov 2025 16:11:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762359121; cv=none; b=OfRFC8ejSKDzlw2l3wCjN5APuTL/W3PSTDZzte7LB/HIM64hjfMKJWS22ZPR2Yghn/ldOx9f71H/j8rhtnHp1d8E9OOeXxGqTFJC1kgRYpuzjSeJHbzpakv2w+Hj/jpLT/WbWhnNmawwVrlsEiteEAr3xaw9O+9+InAkc9RKEF0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762359121; c=relaxed/simple; bh=2BGjkh/JekalauIHx1gD91uKZot6shrPhBrecXqX97M=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=M/lT97jovS64eYoUmHDescAE3bzgEu2aQo89alxQifh3C2H0T7X5p8QEzMO9QLFr8XApJf7BWmhuuiaZYH3RLrzhfZBKLcaCzt9LnXOxypT/5gM60pHMsMk2eEDnKDhGv3jQXT8OaHmFikOqJ7rn1dMkIMfe1J/j/mqdC3PyU5c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=PhYWs65n; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="PhYWs65n" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=kAPfZ/9MFmLoAqOWOpsnTOjNLSyhV2aPcNiujD83BJc=; b=PhYWs65nWStFmCuntFQp5x8y0W z1/+ZZtX0EssZ7haGojfzLcd9XBfEgvf3u0S1D3e31RoBTasG/9ktaEe29ZUGdH+/XAxnLWzaDMei Q+59Cm+jAbp3h8jB4oUkrnSe5pycJ2QBq+bk8pMnJy1tE1D6MSsrxHI14DV47063qPh8=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1vGfko-00D0s4-EZ; Wed, 05 Nov 2025 16:48:58 +0100 Date: Wed, 5 Nov 2025 16:48:58 +0100 From: Andrew Lunn To: "Lad, Prabhakar" Cc: Marek =?iso-8859-1?Q?Beh=FAn?= , linux-leds@vger.kernel.org, netdev@vger.kernel.org, Pavel Machek , Dan Murphy , Russell King , Matthias Schiffer , Jacek Anaszewski , Mauro Carvalho Chehab Subject: Re: [PATCH leds v2 00/10] Add support for offloading netdev trigger to HW + example implementation for Turris Omnia Message-ID: References: <20210601005155.27997-1-kabel@kernel.org> <7d510f5f-959c-49b7-afca-c02009898ef2@lunn.ch> <87875554-1747-4b0e-9805-aed1a4c69a82@lunn.ch> Precedence: bulk X-Mailing-List: linux-leds@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > Sorry for the delayed response. > > I started investigating adding PHY leds. In page 53 section "4.2.27 > LED Behavior" [0] we have an option for LED0/1 combine feature > disable. For this is it OK to add a new DT property? Why do you need a new property? You just need to set this bit depending on what has been selected via /sys/class/led. And if the user asks for a mode which the hardware does not supported, the core will fall back to use on/off and blink the LED itself. PHY LEDs are the wild west. Every vendor has its own idea what is important, and adds features which other vendors don't have. But that does not mean we need to support all the features in Linux. So the core has a reasonable set of features which we expect most PHYs can support. I don't want to add more features unless you have a big business case it is needed, and other PHY also have the same feature. Andrew