From: <gerg@snapgear.com>
To: linux-m68k@vger.kernel.org, uclinux-dev@uclinux.org
Cc: Greg Ungerer <gerg@uclinux.org>
Subject: [PATCH 16/35] m68k: add TLB flush support for the ColdFire V4e MMU hardware
Date: Fri, 25 Nov 2011 13:41:01 +1000 [thread overview]
Message-ID: <1322192480-22822-17-git-send-email-gerg@snapgear.com> (raw)
In-Reply-To: <1322192480-22822-1-git-send-email-gerg@snapgear.com>
From: Greg Ungerer <gerg@uclinux.org>
The ColdFire V4e MMU is unlike any of the other m68k MMU hardware.
It needs its own TLB flush support code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
arch/m68k/include/asm/tlbflush.h | 23 +++++++++++++++++------
1 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/arch/m68k/include/asm/tlbflush.h b/arch/m68k/include/asm/tlbflush.h
index a6b4ed4..965ea35 100644
--- a/arch/m68k/include/asm/tlbflush.h
+++ b/arch/m68k/include/asm/tlbflush.h
@@ -5,10 +5,13 @@
#ifndef CONFIG_SUN3
#include <asm/current.h>
+#include <asm/mcfmmu.h>
static inline void flush_tlb_kernel_page(void *addr)
{
- if (CPU_IS_040_OR_060) {
+ if (CPU_IS_COLDFIRE) {
+ mmu_write(MMUOR, MMUOR_CNL);
+ } else if (CPU_IS_040_OR_060) {
mm_segment_t old_fs = get_fs();
set_fs(KERNEL_DS);
__asm__ __volatile__(".chip 68040\n\t"
@@ -25,12 +28,15 @@ static inline void flush_tlb_kernel_page(void *addr)
*/
static inline void __flush_tlb(void)
{
- if (CPU_IS_040_OR_060)
+ if (CPU_IS_COLDFIRE) {
+ mmu_write(MMUOR, MMUOR_CNL);
+ } else if (CPU_IS_040_OR_060) {
__asm__ __volatile__(".chip 68040\n\t"
"pflushan\n\t"
".chip 68k");
- else if (CPU_IS_020_OR_030)
+ } else if (CPU_IS_020_OR_030) {
__asm__ __volatile__("pflush #0,#4");
+ }
}
static inline void __flush_tlb040_one(unsigned long addr)
@@ -43,7 +49,9 @@ static inline void __flush_tlb040_one(unsigned long addr)
static inline void __flush_tlb_one(unsigned long addr)
{
- if (CPU_IS_040_OR_060)
+ if (CPU_IS_COLDFIRE)
+ mmu_write(MMUOR, MMUOR_CNL);
+ else if (CPU_IS_040_OR_060)
__flush_tlb040_one(addr);
else if (CPU_IS_020_OR_030)
__asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr));
@@ -56,12 +64,15 @@ static inline void __flush_tlb_one(unsigned long addr)
*/
static inline void flush_tlb_all(void)
{
- if (CPU_IS_040_OR_060)
+ if (CPU_IS_COLDFIRE) {
+ mmu_write(MMUOR, MMUOR_CNL);
+ } else if (CPU_IS_040_OR_060) {
__asm__ __volatile__(".chip 68040\n\t"
"pflusha\n\t"
".chip 68k");
- else if (CPU_IS_020_OR_030)
+ } else if (CPU_IS_020_OR_030) {
__asm__ __volatile__("pflusha");
+ }
}
static inline void flush_tlb_mm(struct mm_struct *mm)
--
1.7.0.4
next prev parent reply other threads:[~2011-11-25 3:39 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-25 3:40 [PATCH 00/35 v2] m68k: ColdFire MMU support gerg
2011-11-25 3:40 ` [PATCH 01/35] m68k: add machine and CPU definitions for ColdFire cores gerg
2011-11-25 3:40 ` [PATCH 02/35] m68k: show ColdFire CPU/FPU/MMU type gerg
2011-11-25 3:40 ` [PATCH 03/35] m68k: definitions for the ColdFire V4e MMU hardware gerg
2011-11-25 3:40 ` [PATCH 04/35] m68k: make interrupt definitions conditional on correct CPU types gerg
2011-11-25 3:40 ` [PATCH 05/35] m68k: add TASK definitions for ColdFires running with MMU gerg
2011-12-08 2:05 ` Jin Zhengxiong-R64188
2011-12-08 5:27 ` Greg Ungerer
2011-11-25 3:40 ` [PATCH 06/35] m68k: modify user space access functions to support ColdFire CPUs gerg
2011-11-25 3:40 ` [PATCH 07/35] m68k: use addr_limit checking for m68k CPUs that do no support address spaces gerg
2011-11-25 3:40 ` [PATCH 08/35] m68k: init the MMU hardware for the 54xx ColdFire gerg
2011-11-25 3:40 ` [PATCH 09/35] m68k: add ColdFire 54xx CPU MMU memory init code gerg
2011-11-25 3:40 ` [PATCH 10/35] m68k: set register a2 to current if MMU enabled on ColdFire gerg
2011-11-25 3:40 ` [PATCH 11/35] m68k: page table support definitions and code for ColdFire MMU gerg
2011-11-25 3:40 ` [PATCH 12/35] m68k: add page table size definitions for ColdFire V4e MMU gerg
2011-11-25 3:40 ` [PATCH 13/35] m68k: add ColdFire paging exception handling code gerg
2011-11-25 3:40 ` [PATCH 14/35] m68k: add cache support for V4e ColdFire cores running with MMU enabled gerg
2011-11-25 3:41 ` [PATCH 15/35] m68k: modify ColdFire 54xx cache support for " gerg
2011-11-25 3:41 ` gerg [this message]
2011-11-25 3:41 ` [PATCH 17/35] m68k: define PAGE_OFFSET_RAW for ColdFire CPU with " gerg
2011-11-25 3:41 ` [PATCH 18/35] m68k: set ColdFire MMU page size gerg
2011-11-25 3:41 ` [PATCH 19/35] m68k: MMU enabled ColdFire needs 8k ELF alignment gerg
2011-11-25 3:41 ` [PATCH 20/35] m68k: ColdFire V4e MMU context support code gerg
2011-11-25 3:41 ` [PATCH 21/35] m68k: use tracehook_report_syscall_entry/exit for ColdFire MMU ptrace path gerg
2011-11-25 3:41 ` [PATCH 22/35] m68k: modify cache push and clear code for ColdFire with MMU enable gerg
2011-11-25 3:41 ` [PATCH 23/35] m68k: use ColdFire MMU read/write bit flags when ioremapping gerg
2011-11-25 3:41 ` [PATCH 24/35] m68k: ColdFire V4e MMU paging init code and miss handler gerg
2011-11-25 3:41 ` [PATCH 25/35] m68k: compile appropriate mm arch files for ColdFire MMU support gerg
2011-11-25 3:41 ` [PATCH 26/35] m68k: create ColdFire MMU pgalloc code gerg
2011-11-25 3:41 ` [PATCH 27/35] m68k: use non-MMU entry.S code when compiling for ColdFire CPU gerg
2011-11-25 3:41 ` [PATCH 28/35] m68k: add code to setup a ColdFire 54xx platform when MMU enabled gerg
2011-11-25 3:41 ` [PATCH 29/35] m68k: ColdFire with MMU enabled uses same clocking code as non-MMU gerg
2011-11-25 3:41 ` [PATCH 30/35] m68k: use non-MMU linker script for ColdFire MMU builds gerg
2011-11-25 3:41 ` [PATCH 31/35] m68k: adjustments to stack frame for ColdFire with MMU enabled gerg
2011-11-25 3:41 ` [PATCH 32/35] m68k: add ColdFire FPU support for the V4e ColdFire CPU's gerg
2011-11-25 3:41 ` [PATCH 33/35] m68k: do not use m68k startup or interrupt code for " gerg
2011-11-25 3:41 ` [PATCH 34/35] m68k: add ColdFire with MMU enabled support to the m68k mem init code gerg
2011-11-25 3:41 ` [PATCH 35/35] m68k: allow ColdFire 547x and 548x CPUs to be built with MMU enabled gerg
-- strict thread matches above, loose matches on Subject: below --
2011-12-16 12:35 [PATCH 00/35 v3] m68k: ColdFire MMU support gerg
2011-12-16 12:36 ` [PATCH 16/35] m68k: add TLB flush support for the ColdFire V4e MMU hardware gerg
2011-12-23 3:15 [PATCH 00/35 v4] m68k: ColdFire MMU support gerg
2011-12-23 3:15 ` [PATCH 16/35] m68k: add TLB flush support for the ColdFire V4e MMU hardware gerg
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1322192480-22822-17-git-send-email-gerg@snapgear.com \
--to=gerg@snapgear.com \
--cc=gerg@uclinux.org \
--cc=linux-m68k@vger.kernel.org \
--cc=uclinux-dev@uclinux.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox