Re: [PATCH v2 3/3] scsi/ncr5380: Improve interrupt latency during PIO tranfers

Geert Uytterhoeven
2016-09-09T12:00:18Z

On Fri, Sep 9, 2016 at 1:28 PM, Martin K. Petersen
<martin.petersen@oracle.com> wrote:
>>>>>> "Finn" == Finn Thain <fthain@telegraphics.com.au> writes:
>
> Finn> Large PIO transfers are broken up into chunks to try to avoid
> Finn> disabling local IRQs for long periods. But IRQs are still disabled
> Finn> for too long and this causes SCC FIFO overruns during serial port
> Finn> transfers.
>
> Finn> This patch reduces the PIO chunk size to reduce interrupt latency
> Finn> to something on the order of milliseconds, at the expense of
> Finn> additional CPU overhead from extra iterations of the
> Finn> NCR5380_main() loop.
>
> Finn> That CPU overhead is a problem for slow machines (e.g. mac_scsi on
> Finn> 25 MHz
> Finn> 68030) but these machines generally use PDMA not PIO. This patch
> Finn> doesn't
> Finn> make the overhead any worse on my Mac LC III (because it only gets
> Finn> about 510 accesses per ms).
>
> Finn> This patch decreases disk performance by a fraction of one percent
> Finn> for dmx3191d on my 333 MHz PowerPC 750. Other affected hardware
> Finn> (such as g_NCR5380 on x86) was not tested but 5380 ISA cards
> Finn> generally use PDMA and not PIO.
>
> Geert?

No comments from my side.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds