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[222.152.184.54]) by smtp.gmail.com with ESMTPSA id p5-20020a170902eac500b001b3bf8001a9sm318416pld.48.2023.07.26.20.17.54 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Jul 2023 20:17:57 -0700 (PDT) Subject: Re: Linux 6.4.4 on m68k - Q40 - pata_falcon causes oops at boot time To: Finn Thain References: <1dabd80c-d91e-7869-e95e-199fc58b9f84@linux-m68k.org> <997f0ff1-865d-29fb-ef65-2bb693549da8@linux-m68k.org> <288847c5-46bd-fcd4-11a7-829685a02c79@gmail.com> <521776cc-a11e-0a3a-b44d-fc051f6ee2ea@linux-m68k.org> Cc: William R Sowerbutts , Geert Uytterhoeven , linux-m68k From: Michael Schmitz Message-ID: <624c5629-e337-46ba-c8ac-411fe19f2f46@gmail.com> Date: Thu, 27 Jul 2023 15:17:52 +1200 User-Agent: Mozilla/5.0 (X11; Linux ppc; rv:45.0) Gecko/20100101 Icedove/45.4.0 MIME-Version: 1.0 In-Reply-To: <521776cc-a11e-0a3a-b44d-fc051f6ee2ea@linux-m68k.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-m68k@vger.kernel.org Hi Finn, Am 27.07.2023 um 13:16 schrieb Finn Thain: >> A correct fix would keep the current IO translation intact, and instead >> use the platform mem resource to register the driver IO range, and the >> platform IO resource as base offset to populate the port ioaddr struct >> (minus the register scaling and byte offset, mind you). >> >> I'll give this some more thought ASAP. >> > > I wonder whether Will's suggestion (CONFIG_HAS_IOPORT_MAP) is feasible in > light of the needs of Gayle and EtherNEC drivers. I'll have to see how that works - both Gayle and EtherNEC don't just need address translation but their respective quirky IO access functions. > >> And yes, I'm painfully aware the m68k low level IO code is becoming a >> bit of a maintainance legacy, in no small part due to my hacks around >> Atari EtherNEC. >> > > I guess you and I both can share the blame for 44b1fbc0f5f30e66... > > Anyway, you make a good point about on-going maintenance. Do you think > that by supporting standard ISA drivers we might actually reduce the > ideosyncracies in m68k IO code? You and DaveM ought to have a chat about that - abstracting the legacy drivers from the ISA constraints was his preferred option when I last attempted to get the Gayle network driver patches merged. When I say 'preferred', I'm probably understating a little. I had toyed with that using the EtherNEC driver as test case but never got very far (this would have been splitting the driver into a core lib8390 module and a platform-specific module that allows to hook a variety of IO accessors as hooks, not static defines, and I wasn't too certain about performance impacts of such a change, the performance of the EtherNEC being so shitty it won't make any impact there), The only other option (that I can see) would be creating a bus driver for the ISA bus, with platforms allowed to register their particular IO accessors for IO and memory accesses - again, performance impacts to consider and getting test coverage on legacy ISA hardware a nightmare. This would allow to use legacy driver code more or less unchanged. Haven't given that much thought at all (the idea pretty much originated from this present mess, but that's all). There may be other approaches that can be considered, if none of this is what you had in mind. Cheers, Michael