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[209.85.222.49]) by smtp.gmail.com with ESMTPSA id ada2fe7eead31-52af1e46f50sm2750862137.14.2025.09.01.01.39.09 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 Sep 2025 01:39:09 -0700 (PDT) Received: by mail-ua1-f49.google.com with SMTP id a1e0cc1a2514c-8943761ca20so2301645241.2 for ; Mon, 01 Sep 2025 01:39:09 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCUGhETaF9uLv0OFPgCyxkupjZJUwawLNutsc7DLCUwK/kWoZmi8DAWtqTeGv2zSOQvoJXZDC40CND9k@lists.linux-m68k.org X-Received: by 2002:a05:6102:5789:b0:51c:4443:16e0 with SMTP id ada2fe7eead31-52b1be316e5mr1967209137.30.1756715948932; Mon, 01 Sep 2025 01:39:08 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-m68k@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250822145605.18172-1-ilpo.jarvinen@linux.intel.com> <20250827223606.GA915856@bhelgaas> In-Reply-To: <20250827223606.GA915856@bhelgaas> From: Geert Uytterhoeven Date: Mon, 1 Sep 2025 10:38:57 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: Ac12FXyky2hWsQI9uSpsphCp4R_EUgbfbVJ67zlGAAXkq-snhjMBdE6QAlpgqhY Message-ID: Subject: Re: [PATCH 00/24] PCI: Bridge window selection improvements To: Bjorn Helgaas Cc: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Andreas Larsson , Bjorn Helgaas , "David S. Miller" , linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, linux-pci@vger.kernel.org, sparclinux@vger.kernel.org, Thomas Bogendoerfer , =?UTF-8?Q?Christian_K=C3=B6nig?= , Yinghai Lu , Igor Mammedov , "Rafael J . Wysocki" , Jonathan Cameron , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , linux-kernel@vger.kernel.org, =?UTF-8?Q?Micha=C5=82_Winiarski?= , linuxppc-dev@lists.ozlabs.org, Greg Ungerer Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable CC Greg On Thu, 28 Aug 2025 at 00:36, Bjorn Helgaas wrote: > On Fri, Aug 22, 2025 at 05:55:41PM +0300, Ilpo J=C3=A4rvinen wrote: > > This series is based on top of the three resource fitting and > > assignment algorithm fixes (v3). > > > > PCI resource fitting and assignment code needs to find the bridge > > window a resource belongs to in multiple places, yet, no common > > function for that exists. Thus, each site has its own version of > > the decision, each with their own corner cases, misbehaviors, and > > some resulting in complex interfaces between internal functions. > > ... > > > I've tried to look out for any trouble that code under arch/ could > > cause after the flags start to behave differently and therefore ended > > up consolidating arch/ code to use pci_enable_resources(). My > > impression is that strictly speaking only the MIPS code would break > > similar to PCI core's copy of pci_enable_resources(), the others were > > much more lax in checking so they'd likely keep working but > > consolidation seemed still the best approach there as the enable checks > > seemed diverging for no apparent reason. > > ... > > > m68k/PCI: Use pci_enable_resources() in pcibios_enable_device() > > sparc/PCI: Remove pcibios_enable_device() as they do nothing extra > > MIPS: PCI: Use pci_enable_resources() > > ... > > > arch/m68k/kernel/pcibios.c | 39 +- > > arch/mips/pci/pci-legacy.c | 38 +- > > arch/sparc/kernel/leon_pci.c | 27 -- > > arch/sparc/kernel/pci.c | 27 -- > > arch/sparc/kernel/pcic.c | 27 -- > > ... > > I love the fact that you're doing so much cleanup. Thanks for all the > work in this! > > Obviously all this code is quite sensitive, so I put it on > pci/resource to get more exposure in -next. If it turns out that we > trip over things or just don't feel comfortable yet for v6.18, we can > always defer this part until the next cycle. > > I will also watch for acks from the m68k, mips, and sparc maintainers > for those pieces.