Re: FPU emulation incorrect for 68LC040?

Mattias Engdegård
2010-07-24T18:33:20Z

> the way I understood post-increment to work was for this to happen
> only after instruction execution. If the effective address had been
> modified already, it would be more difficult for an emulator to
> determine the correct address after the trap. Also, it seems more
> efficient to first decode the instruction (and trap if needed) before
> fully decoding the address.

The 68LC040 calculates the effective address of unimplemented FP
instructions and puts it in the exception frame so that the emulator
should not have to - after all, the CPU already has the hardware to do
EA calculations the right way. On the other hand, an instruction that
traps will not, in general, alter any register.

For example, move.l -(a0),-(a0) will decrement a0 twice, once before
the load and once again before the store. But if the either the load
or store traps, the exception handler will see an unchanged register.
At least this is my understanding after various experiments - the
official docs are not very explicit about it.