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From: Hans de Goede <hdegoede@redhat.com>
To: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Sakari Ailus <sakari.ailus@linux.intel.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Andy Shevchenko <andy@kernel.org>, Kate Hsuan <hpa@redhat.com>,
	linux-media@vger.kernel.org
Subject: Re: [PATCH v2 1/5] media: Add MIPI CCI register access helper functions
Date: Mon, 19 Jun 2023 10:46:18 +0200	[thread overview]
Message-ID: <140a97fa-8974-e2e1-e2f5-4f46cb0ec24f@redhat.com> (raw)
In-Reply-To: <ZJAOIN3hQcjkOlqs@tom-HP-ZBook-Fury-15-G7-Mobile-Workstation>

Hi,

On 6/19/23 10:13, Tommaso Merciai wrote:
> Hi Hans, Laurent,
> 
> On Fri, Jun 16, 2023 at 06:54:54PM +0200, Hans de Goede wrote:
>> Hi Tommaso,
>>
>> On 6/15/23 18:15, Tommaso Merciai wrote:
>>> Hi Hans,
>>>
>>> On Thu, Jun 15, 2023 at 02:00:46PM +0200, Hans de Goede wrote:
>>>> Hi,
>>>>
>>>> On 6/15/23 13:54, Tommaso Merciai wrote:
>>>>> On Thu, Jun 15, 2023 at 01:26:25PM +0200, Tommaso Merciai wrote:
>>>>>> Hi Hans,
>>>>>>
>>>>>> On Thu, Jun 15, 2023 at 01:10:40PM +0200, Hans de Goede wrote:
>>>>>>> Hi Tommaso,
>>>>>>>
>>>>>>> On 6/15/23 12:05, Tommaso Merciai wrote:
>>>>>>>> Hi Hans, Laurent, Sakari,
>>>>>>>>
>>>>>>>> Can I cherry-pick this patch and use these new functions also
>>>>>>>> for cci regs of the alvium driver?
>>>>>>>
>>>>>>> Yes that sounds like a good plan.
>>>>>>>
>>>>>>>> Are on going to be merge?
>>>>>>>
>>>>>>> Yes this will hopefully get merged upstream soon.
>>>>>>
>>>>>> Thanks for the info!
>>>>>>
>>>>>> I want to ask you your opinion about this:
>>>>>>
>>>>>> Into alvium driver actually I'm using the following defines
>>>>>> manipulations:
>>>>>>
>>>>>> #define REG_BCRM_REG_ADDR_R				REG_BCRM_CCI_16BIT(0x0014)
>>>>>>
>>>>>> #define REG_BCRM_FEATURE_INQUIRY_R			REG_BCRM_V4L2_64BIT(0x0008)
>>>>>> #define REG_BCRM_DEVICE_FIRMWARE_VERSION_R		REG_BCRM_V4L2_64BIT(0x0010)
>>>>>>
>>>>>> My plan is to use your cci API for cci register in this way defines
>>>>>> became like:
>>>>>>
>>>>>> #define REG_BCRM_REG_ADDR_R				CCI_REG16(0x0014)
>>>>>>
>>>>>> And leave v4l2 regs are it are right now:
>>>>>>
>>>>>> #define REG_BCRM_FEATURE_INQUIRY_R			REG_BCRM_V4L2_64BIT(0x0008)
>>>>>> #define REG_BCRM_DEVICE_FIRMWARE_VERSION_R		REG_BCRM_V4L2_64BIT(0x0010)
>>>>>>
>>>>>> What do you think about?
>>>>>
>>>>> Or maybe is worth don't use v4l2 bit for v4l2 regs, I think is implicit
>>>>> that what regs that are not CCI are v4l2, then we return wit the
>>>>> following defines:
>>>>>
>>>>>
>>>>>
>>>>> #define REG_BCRM_REG_ADDR_R                           CCI_REG16(0x0014)
>>>>> ^CCI regs
>>>>>
>>>>> #define REG_BCRM_FEATURE_INQUIRY_R                    0x0008 
>>>>> #define REG_BCRM_DEVICE_FIRMWARE_VERSION_R            0x0010
>>>>> ^v4l2 regs
>>>>
>>>> I'm not sure what you mean with "V4L2" registers ? I guess you mean
>>>> registers which cannot be accessed through the CCI helper functions,
>>>> but starting with v2 this is no longer true. There now is a CCI_REG64()
>>>> so you can simply use that.
>>>
>>> I'm playing a bit with v3 of your cci api :)
>>>
>>> My problem is the following, bcrm regs are not real regs but are offset
>>> from bcrm address (this is not fixed, it depends on the camera).
>>>
>>> Then the workflow is:
>>>
>>>  - read bcrm_address (base address)
>>>  - then sum this to the offset (regs)
>>>
>>> Myabe this clarify:
>>>
>>> static int alvium_read(struct alvium_dev *alvium, u32 reg, u64 *val)
>>> {
>>> 	int ret;
>>>
>>> 	if (reg & REG_BCRM_V4L2)
>>> 		reg += alvium->bcrm_addr;
>>>
>>> 	cci_read(alvium->regmap, reg, val, &ret);
>>> 	if (ret)
>>> 		return ret;
>>>
>>> 	return 0;
>>> }
>>>
>>> int alvium_write(struct alvium_dev *alvium, u32 reg, u64 val)
>>> {
>>> 	int ret;
>>>
>>> 	if (reg & REG_BCRM_V4L2)
>>> 		reg += alvium->bcrm_addr;
>>>
>>> 	cci_write(alvium->regmap, reg, val, &ret);
>>> 	if (ret)
>>> 		return ret;
>>>
>>> 	return 0;
>>> }
>>>
>>> Where for example:
>>>
>>> #define REG_BCRM_V4L2		BIT(31)
>>> #define REG_BCRM_V4L2_64BIT(n)	(REG_BCRM_V4L2 | CCI_REG64(n))
>>>
>>> #define REG_BCRM_WRITE_HANDSHAKE_RW REG_BCRM_V4L2_8BIT(0x0418)
>>>
>>>
>>> But I'm not sure that I'm in the right direction. 
>>>
>>> In real I need first to get the real address then sum the bcrm_address
>>> if this is a bcrm regs(offset) then re-incapsule the address into the
>>> right CCI_REG# defines.
>>
>> Ah I see, so you have a set of windowed registers where
>> the base address of these registers may change.
> 
> Yep, right :)
> 
>>
>> What I don't understand though is why you use V4L2 in the
>> name of the #defines for this? Does the datasheet actually
>> name them like this ? V4L2 stands for video4linux version 2,
>> so unless these registers are somehow Linux specific using
>> V4L2 in the #define names is a bit weird IMHO.
> 
> These registers are offered from the alvium fw for v4l2 API.
> We had a previous discussion with Laurent about this.

Ah, ok that explains. Then the V4L2 in the register #defines makes
sense and I'm fine with it.

Regards,

Hans


  reply	other threads:[~2023-06-19  8:49 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-14 19:23 [PATCH v2 0/5] media: Add MIPI CCI register access helper functions Hans de Goede
2023-06-14 19:23 ` [PATCH v2 1/5] " Hans de Goede
2023-06-14 20:09   ` Andy Shevchenko
2023-06-14 20:39   ` Sakari Ailus
2023-06-14 21:34     ` Laurent Pinchart
2023-06-14 21:48       ` Sakari Ailus
2023-06-14 22:11         ` Laurent Pinchart
2023-06-15  9:11         ` Hans de Goede
2023-06-15  9:21           ` Laurent Pinchart
2023-06-15 10:05             ` Tommaso Merciai
2023-06-15 11:10               ` Hans de Goede
2023-06-15 11:26                 ` Tommaso Merciai
2023-06-15 11:54                   ` Tommaso Merciai
2023-06-15 12:00                     ` Hans de Goede
2023-06-15 16:15                       ` Tommaso Merciai
2023-06-15 16:52                         ` Laurent Pinchart
2023-06-15 22:20                           ` Tommaso Merciai
2023-06-16 13:41                             ` Laurent Pinchart
2023-06-16 14:08                               ` Tommaso Merciai
2023-06-16 14:15                               ` Tommaso Merciai
2023-06-16 14:17                                 ` Laurent Pinchart
2023-06-16 14:56                                   ` Tommaso Merciai
2023-06-16 15:07                                     ` Laurent Pinchart
2023-06-16 16:34                                       ` Tommaso Merciai
2023-06-16 16:54                         ` Hans de Goede
2023-06-19  8:13                           ` Tommaso Merciai
2023-06-19  8:46                             ` Hans de Goede [this message]
2023-06-15 10:08           ` Sakari Ailus
2023-06-15  8:56       ` Hans de Goede
2023-06-14 22:21     ` Andy Shevchenko
2023-06-14 22:24       ` Andy Shevchenko
2023-06-15  8:45     ` Hans de Goede
2023-06-15  9:54       ` Sakari Ailus
2023-06-15 10:15         ` Hans de Goede
2023-06-15 10:35           ` Andy Shevchenko
2023-06-15 11:41           ` Sakari Ailus
2023-06-15 12:05             ` Hans de Goede
2023-06-15 13:19               ` Sakari Ailus
2023-06-15 13:28                 ` Sakari Ailus
2023-06-15 13:52                 ` Hans de Goede
2023-06-15 13:23             ` Andy Shevchenko
2023-06-14 19:23 ` [PATCH v2 2/5] media: ov5693: Convert to new CCI register access helpers Hans de Goede
2023-06-14 20:13   ` Andy Shevchenko
2023-06-15  9:16     ` Hans de Goede
2023-06-14 21:54   ` Laurent Pinchart
2023-06-14 19:23 ` [PATCH v2 3/5] media: imx290: " Hans de Goede
2023-06-14 22:04   ` Laurent Pinchart
2023-06-14 19:23 ` [PATCH v2 4/5] media: atomisp: ov2680: " Hans de Goede
2023-06-14 20:15   ` Andy Shevchenko
2023-06-15  9:02     ` Hans de Goede
2023-06-15 10:16       ` Andy Shevchenko
2023-06-14 19:23 ` [PATCH v2 5/5] media: Remove ov_16bit_addr_reg_helpers.h Hans de Goede
2023-06-14 20:17   ` Andy Shevchenko

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