From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-media@vger.kernel.org,
Manivannan Sadhasivam <mani@kernel.org>,
Sakari Ailus <sakari.ailus@iki.fi>
Subject: Re: Re: [PATCH 10/19] media: i2c: imx290: Define more register macros
Date: Thu, 21 Jul 2022 13:28:34 +0200 [thread overview]
Message-ID: <14662940.dW097sEU6C@steina-w> (raw)
In-Reply-To: <YtkzlfWXKl2hZKy0@pendragon.ideasonboard.com>
Hi Laurent,
Am Donnerstag, 21. Juli 2022, 13:08:05 CEST schrieb Laurent Pinchart:
> Hi Alexander,
>
> On Thu, Jul 21, 2022 at 12:00:55PM +0200, Alexander Stein wrote:
> > Am Donnerstag, 21. Juli 2022, 10:35:31 CEST schrieb Laurent Pinchart:
> > > Define macros for all registers programmed by the driver for which
> > > documentation is available to increase readability. This starts making
> > > use of 16-bit registers in the register arrays, so the value field has
> > > to be increased to 32 bits.
> > >
> > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > ---
> > >
> > > drivers/media/i2c/imx290.c | 219 +++++++++++++++++++++----------------
> > > 1 file changed, 124 insertions(+), 95 deletions(-)
> > >
> > > diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c
> > > index 5b7f9027b50f..bec326a83952 100644
> > > --- a/drivers/media/i2c/imx290.c
> > > +++ b/drivers/media/i2c/imx290.c
> > > @@ -31,14 +31,73 @@
> > >
> > > #define IMX290_STANDBY
IMX290_REG_8BIT(0x3000)
> > > #define IMX290_REGHOLD
IMX290_REG_8BIT(0x3001)
> > > #define IMX290_XMSTA
IMX290_REG_8BIT(0x3002)
> > >
> > > +#define IMX290_ADBIT
IMX290_REG_8BIT(0x3005)
> > > +#define IMX290_ADBIT_10BIT (0 << 0)
> > > +#define IMX290_ADBIT_12BIT (1 << 0)
> > > +#define IMX290_CTRL_07
IMX290_REG_8BIT(0x3007)
> > > +#define IMX290_VREVERSE
BIT(0)
> > > +#define IMX290_HREVERSE
BIT(1)
> > > +#define IMX290_WINMODE_1080P
(0 << 4)
> > > +#define IMX290_WINMODE_720P
(1 << 4)
> > > +#define IMX290_WINMODE_CROP
(4 << 4)
> > >
> > > #define IMX290_FR_FDG_SEL
IMX290_REG_8BIT(0x3009)
> > > #define IMX290_BLKLEVEL
IMX290_REG_16BIT(0x300a)
> > > #define IMX290_GAIN
IMX290_REG_8BIT(0x3014)
> > >
> > > +#define IMX290_VMAX
IMX290_REG_24BIT(0x3018)
> > >
> > > #define IMX290_HMAX
IMX290_REG_16BIT(0x301c)
> > >
> > > +#define IMX290_SHS1
IMX290_REG_24BIT(0x3020)
> > > +#define IMX290_WINWV_OB
IMX290_REG_8BIT(0x303a)
> > > +#define IMX290_WINPV
IMX290_REG_16BIT(0x303c)
> > > +#define IMX290_WINWV
IMX290_REG_16BIT(0x303e)
> > > +#define IMX290_WINPH
IMX290_REG_16BIT(0x3040)
> > > +#define IMX290_WINWH
IMX290_REG_16BIT(0x3042)
> > > +#define IMX290_OUT_CTRL
IMX290_REG_8BIT(0x3046)
> > > +#define IMX290_ODBIT_10BIT (0 << 0)
> > > +#define IMX290_ODBIT_12BIT (1 << 0)
> >
> > ODBIT is fixed 1h for MIPI-CSI-2 output.
> >
> > > +#define IMX290_OPORTSEL_PARALLEL (0x0 << 4)
> > > +#define IMX290_OPORTSEL_LVDS_2CH (0xd << 4)
> > > +#define IMX290_OPORTSEL_LVDS_4CH (0xe << 4)
> > > +#define IMX290_OPORTSEL_LVDS_8CH (0xf << 4)
> >
> > This driver only supports MIPI-CSI-2 output, but these bits are don't
> > care,
> > you still want to list them here for completeness?
>
> Yes, it could be useful later.
Ok, fine with me.
> > > +#define IMX290_XSOUTSEL
IMX290_REG_8BIT(0x304b)
> > > +#define IMX290_XSOUTSEL_XVSOUTSEL_HIGH
(0 << 0)
> > > +#define IMX290_XSOUTSEL_XVSOUTSEL_VSYNC
(2 << 0)
> > > +#define IMX290_XSOUTSEL_XHSOUTSEL_HIGH
(0 << 2)
> > > +#define IMX290_XSOUTSEL_XHSOUTSEL_HSYNC
(2 << 2)
> > > +#define IMX290_INCKSEL1
IMX290_REG_8BIT(0x305c)
> > > +#define IMX290_INCKSEL2
IMX290_REG_8BIT(0x305d)
> > > +#define IMX290_INCKSEL3
IMX290_REG_8BIT(0x305e)
> > > +#define IMX290_INCKSEL4
IMX290_REG_8BIT(0x305f)
> > >
> > > #define IMX290_PGCTRL
IMX290_REG_8BIT(0x308c)
> > >
> > > +#define IMX290_ADBIT1
IMX290_REG_8BIT(0x3129)
> > > +#define IMX290_ADBIT1_10BIT
0x1d
> > > +#define IMX290_ADBIT1_12BIT
0x00
> > > +#define IMX290_INCKSEL5
IMX290_REG_8BIT(0x315e)
> > > +#define IMX290_INCKSEL6
IMX290_REG_8BIT(0x3164)
> >
> > Any reason to skip the bit defines for both supported input clocks?
>
> I don't have access to information that describes the bits in those two
> registers, just magic values for the 37.125 MHz and 74.25 MHz input
> clocks. Would you happen to know more ?
See [1] and line 354 as well. This register is depending on the external
clock.
[1] https://github.com/tq-systems/linux-tqmaxx/blob/TQMa8-fslc-5.10-2.1.x-imx/
drivers/media/i2c/imx290.c#L344
> > > +#define IMX290_ADBIT2
IMX290_REG_8BIT(0x317c)
> > > +#define IMX290_ADBIT2_10BIT
0x12
> > > +#define IMX290_ADBIT2_12BIT
0x00
> > >
> > > #define IMX290_CHIP_ID
IMX290_REG_16BIT(0x319a)
> > >
> > > +#define IMX290_ADBIT3
IMX290_REG_16BIT(0x31ec)
> > > +#define IMX290_ADBIT3_10BIT
0x37
> > > +#define IMX290_ADBIT3_12BIT
0x0e
> > > +#define IMX290_REPETITION
IMX290_REG_8BIT(0x3405)
> > >
> > > #define IMX290_PHY_LANE_NUM
IMX290_REG_8BIT(0x3407)
> > >
> > > +#define IMX290_OPB_SIZE_V
IMX290_REG_8BIT(0x3414)
> > > +#define IMX290_Y_OUT_SIZE
IMX290_REG_16BIT(0x3418)
> > > +#define IMX290_CSI_DT_FMT
IMX290_REG_16BIT(0x3441)
> > > +#define IMX290_CSI_DT_FMT_RAW10
0x0a0a
> > > +#define IMX290_CSI_DT_FMT_RAW12
0x0c0c
> > >
> > > #define IMX290_CSI_LANE_MODE
IMX290_REG_8BIT(0x3443)
> > >
> > > +#define IMX290_EXTCK_FREQ
IMX290_REG_16BIT(0x3444)
> >
> > Same here.
>
> Same explanation as above :-)
This register also depends on external clock, see [2] and line 228 as well.
[2] https://github.com/tq-systems/linux-tqmaxx/blob/TQMa8-fslc-5.10-2.1.x-imx/
drivers/media/i2c/imx290.c#L218
Best regards,
Alexander
> > > +#define IMX290_TCLKPOST
IMX290_REG_16BIT(0x3446)
> > > +#define IMX290_THSZERO
IMX290_REG_16BIT(0x3448)
> > > +#define IMX290_THSPREPARE
IMX290_REG_16BIT(0x344a)
> > > +#define IMX290_TCLKTRAIL
IMX290_REG_16BIT(0x344c)
> > > +#define IMX290_THSTRAIL
IMX290_REG_16BIT(0x344e)
> > > +#define IMX290_TCLKZERO
IMX290_REG_16BIT(0x3450)
> > > +#define IMX290_TCLKPREPARE
IMX290_REG_16BIT(0x3452)
> > > +#define IMX290_TLPX
IMX290_REG_16BIT(0x3454)
> > > +#define IMX290_X_OUT_SIZE
IMX290_REG_16BIT(0x3472)
> > >
> > > #define IMX290_PGCTRL_REGEN
BIT(0)
> > > #define IMX290_PGCTRL_THRU BIT(1)
> > >
> > > @@ -54,7 +113,7 @@ static const char * const imx290_supply_name[] = {
> > >
> > > struct imx290_regval {
> > >
> > > u32 reg;
> > >
> > > - u8 val;
> > > + u32 val;
> > >
> > > };
> > >
> > > struct imx290_mode {
> > >
> > > @@ -116,22 +175,16 @@ static const char * const
> > > imx290_test_pattern_menu[] = { };
> > >
> > > static const struct imx290_regval imx290_global_init_settings[] = {
> > >
> > > - { IMX290_REG_8BIT(0x3007), 0x00 },
> > > - { IMX290_REG_8BIT(0x3018), 0x65 },
> > > - { IMX290_REG_8BIT(0x3019), 0x04 },
> > > - { IMX290_REG_8BIT(0x301a), 0x00 },
> > > - { IMX290_REG_8BIT(0x3444), 0x20 },
> > > - { IMX290_REG_8BIT(0x3445), 0x25 },
> > > - { IMX290_REG_8BIT(0x303a), 0x0c },
> > > - { IMX290_REG_8BIT(0x3040), 0x00 },
> > > - { IMX290_REG_8BIT(0x3041), 0x00 },
> > > - { IMX290_REG_8BIT(0x303c), 0x00 },
> > > - { IMX290_REG_8BIT(0x303d), 0x00 },
> > > - { IMX290_REG_8BIT(0x3042), 0x9c },
> > > - { IMX290_REG_8BIT(0x3043), 0x07 },
> > > - { IMX290_REG_8BIT(0x303e), 0x49 },
> > > - { IMX290_REG_8BIT(0x303f), 0x04 },
> > > - { IMX290_REG_8BIT(0x304b), 0x0a },
> > > + { IMX290_CTRL_07, IMX290_WINMODE_1080P },
> > > + { IMX290_VMAX, 1125 },
> > > + { IMX290_EXTCK_FREQ, 0x2520 },
> > > + { IMX290_WINWV_OB, 12 },
> > > + { IMX290_WINPH, 0 },
> > > + { IMX290_WINPV, 0 },
> > > + { IMX290_WINWH, 1948 },
> > > + { IMX290_WINWV, 1097 },
> > > + { IMX290_XSOUTSEL, IMX290_XSOUTSEL_XVSOUTSEL_VSYNC |
> > > + IMX290_XSOUTSEL_XHSOUTSEL_HSYNC },
> > >
> > > { IMX290_REG_8BIT(0x300f), 0x00 },
> > > { IMX290_REG_8BIT(0x3010), 0x21 },
> > > { IMX290_REG_8BIT(0x3012), 0x64 },
> > >
> > > @@ -177,102 +230,78 @@ static const struct imx290_regval
> > > imx290_global_init_settings[] = {
> > >
> > > static const struct imx290_regval imx290_1080p_settings[] = {
> > >
> > > /* mode settings */
> > >
> > > - { IMX290_REG_8BIT(0x3007), 0x00 },
> > > - { IMX290_REG_8BIT(0x303a), 0x0c },
> > > - { IMX290_REG_8BIT(0x3414), 0x0a },
> > > - { IMX290_REG_8BIT(0x3472), 0x80 },
> > > - { IMX290_REG_8BIT(0x3473), 0x07 },
> > > - { IMX290_REG_8BIT(0x3418), 0x38 },
> > > - { IMX290_REG_8BIT(0x3419), 0x04 },
> > > + { IMX290_CTRL_07, IMX290_WINMODE_1080P },
> > > + { IMX290_WINWV_OB, 12 },
> > > + { IMX290_OPB_SIZE_V, 10 },
> > > + { IMX290_X_OUT_SIZE, 1920 },
> > > + { IMX290_Y_OUT_SIZE, 1080 },
> > >
> > > { IMX290_REG_8BIT(0x3012), 0x64 },
> > > { IMX290_REG_8BIT(0x3013), 0x00 },
> > >
> > > - { IMX290_REG_8BIT(0x305c), 0x18 },
> > > - { IMX290_REG_8BIT(0x305d), 0x03 },
> > > - { IMX290_REG_8BIT(0x305e), 0x20 },
> > > - { IMX290_REG_8BIT(0x305f), 0x01 },
> > > - { IMX290_REG_8BIT(0x315e), 0x1a },
> > > - { IMX290_REG_8BIT(0x3164), 0x1a },
> > > + { IMX290_INCKSEL1, 0x18 },
> > > + { IMX290_INCKSEL2, 0x03 },
> > > + { IMX290_INCKSEL3, 0x20 },
> > > + { IMX290_INCKSEL4, 0x01 },
> > > + { IMX290_INCKSEL5, 0x1a },
> > > + { IMX290_INCKSEL6, 0x1a },
> > >
> > > { IMX290_REG_8BIT(0x3480), 0x49 },
> > > /* data rate settings */
> > >
> > > - { IMX290_REG_8BIT(0x3405), 0x10 },
> > > - { IMX290_REG_8BIT(0x3446), 0x57 },
> > > - { IMX290_REG_8BIT(0x3447), 0x00 },
> > > - { IMX290_REG_8BIT(0x3448), 0x37 },
> > > - { IMX290_REG_8BIT(0x3449), 0x00 },
> > > - { IMX290_REG_8BIT(0x344a), 0x1f },
> > > - { IMX290_REG_8BIT(0x344b), 0x00 },
> > > - { IMX290_REG_8BIT(0x344c), 0x1f },
> > > - { IMX290_REG_8BIT(0x344d), 0x00 },
> > > - { IMX290_REG_8BIT(0x344e), 0x1f },
> > > - { IMX290_REG_8BIT(0x344f), 0x00 },
> > > - { IMX290_REG_8BIT(0x3450), 0x77 },
> > > - { IMX290_REG_8BIT(0x3451), 0x00 },
> > > - { IMX290_REG_8BIT(0x3452), 0x1f },
> > > - { IMX290_REG_8BIT(0x3453), 0x00 },
> > > - { IMX290_REG_8BIT(0x3454), 0x17 },
> > > - { IMX290_REG_8BIT(0x3455), 0x00 },
> > > + { IMX290_REPETITION, 0x10 },
> > > + { IMX290_TCLKPOST, 87 },
> > > + { IMX290_THSZERO, 55 },
> > > + { IMX290_THSPREPARE, 31 },
> > > + { IMX290_TCLKTRAIL, 31 },
> > > + { IMX290_THSTRAIL, 31 },
> > > + { IMX290_TCLKZERO, 119 },
> > > + { IMX290_TCLKPREPARE, 31 },
> > > + { IMX290_TLPX, 23 },
> > >
> > > };
> > >
> > > static const struct imx290_regval imx290_720p_settings[] = {
> > >
> > > /* mode settings */
> > >
> > > - { IMX290_REG_8BIT(0x3007), 0x10 },
> > > - { IMX290_REG_8BIT(0x303a), 0x06 },
> > > - { IMX290_REG_8BIT(0x3414), 0x04 },
> > > - { IMX290_REG_8BIT(0x3472), 0x00 },
> > > - { IMX290_REG_8BIT(0x3473), 0x05 },
> > > - { IMX290_REG_8BIT(0x3418), 0xd0 },
> > > - { IMX290_REG_8BIT(0x3419), 0x02 },
> > > + { IMX290_CTRL_07, IMX290_WINMODE_720P },
> > > + { IMX290_WINWV_OB, 6 },
> > > + { IMX290_OPB_SIZE_V, 4 },
> > > + { IMX290_X_OUT_SIZE, 1280 },
> > > + { IMX290_Y_OUT_SIZE, 720 },
> > >
> > > { IMX290_REG_8BIT(0x3012), 0x64 },
> > > { IMX290_REG_8BIT(0x3013), 0x00 },
> > >
> > > - { IMX290_REG_8BIT(0x305c), 0x20 },
> > > - { IMX290_REG_8BIT(0x305d), 0x00 },
> > > - { IMX290_REG_8BIT(0x305e), 0x20 },
> > > - { IMX290_REG_8BIT(0x305f), 0x01 },
> > > - { IMX290_REG_8BIT(0x315e), 0x1a },
> > > - { IMX290_REG_8BIT(0x3164), 0x1a },
> > > + { IMX290_INCKSEL1, 0x20 },
> > > + { IMX290_INCKSEL2, 0x00 },
> > > + { IMX290_INCKSEL3, 0x20 },
> > > + { IMX290_INCKSEL4, 0x01 },
> > > + { IMX290_INCKSEL5, 0x1a },
> > > + { IMX290_INCKSEL6, 0x1a },
> > >
> > > { IMX290_REG_8BIT(0x3480), 0x49 },
> > > /* data rate settings */
> > >
> > > - { IMX290_REG_8BIT(0x3405), 0x10 },
> > > - { IMX290_REG_8BIT(0x3446), 0x4f },
> > > - { IMX290_REG_8BIT(0x3447), 0x00 },
> > > - { IMX290_REG_8BIT(0x3448), 0x2f },
> > > - { IMX290_REG_8BIT(0x3449), 0x00 },
> > > - { IMX290_REG_8BIT(0x344a), 0x17 },
> > > - { IMX290_REG_8BIT(0x344b), 0x00 },
> > > - { IMX290_REG_8BIT(0x344c), 0x17 },
> > > - { IMX290_REG_8BIT(0x344d), 0x00 },
> > > - { IMX290_REG_8BIT(0x344e), 0x17 },
> > > - { IMX290_REG_8BIT(0x344f), 0x00 },
> > > - { IMX290_REG_8BIT(0x3450), 0x57 },
> > > - { IMX290_REG_8BIT(0x3451), 0x00 },
> > > - { IMX290_REG_8BIT(0x3452), 0x17 },
> > > - { IMX290_REG_8BIT(0x3453), 0x00 },
> > > - { IMX290_REG_8BIT(0x3454), 0x17 },
> > > - { IMX290_REG_8BIT(0x3455), 0x00 },
> > > + { IMX290_REPETITION, 0x10 },
> > > + { IMX290_TCLKPOST, 79 },
> > > + { IMX290_THSZERO, 47 },
> > > + { IMX290_THSPREPARE, 23 },
> > > + { IMX290_TCLKTRAIL, 23 },
> > > + { IMX290_THSTRAIL, 23 },
> > > + { IMX290_TCLKZERO, 87 },
> > > + { IMX290_TCLKPREPARE, 23 },
> > > + { IMX290_TLPX, 23 },
> > >
> > > };
> > >
> > > static const struct imx290_regval imx290_10bit_settings[] = {
> > >
> > > - { IMX290_REG_8BIT(0x3005), 0x00},
> > > - { IMX290_REG_8BIT(0x3046), 0x00},
> > > - { IMX290_REG_8BIT(0x3129), 0x1d},
> > > - { IMX290_REG_8BIT(0x317c), 0x12},
> > > - { IMX290_REG_8BIT(0x31ec), 0x37},
> > > - { IMX290_REG_8BIT(0x3441), 0x0a},
> > > - { IMX290_REG_8BIT(0x3442), 0x0a},
> > > - { IMX290_REG_8BIT(0x300a), 0x3c},
> > > - { IMX290_REG_8BIT(0x300b), 0x00},
> > > + { IMX290_ADBIT, IMX290_ADBIT_10BIT },
> > > + { IMX290_OUT_CTRL, IMX290_ODBIT_10BIT },
> > > + { IMX290_ADBIT1, IMX290_ADBIT1_10BIT },
> > > + { IMX290_ADBIT2, IMX290_ADBIT2_10BIT },
> > > + { IMX290_ADBIT3, IMX290_ADBIT3_10BIT },
> > > + { IMX290_CSI_DT_FMT, IMX290_CSI_DT_FMT_RAW10 },
> > > + { IMX290_BLKLEVEL, 60 },
> > >
> > > };
> > >
> > > static const struct imx290_regval imx290_12bit_settings[] = {
> > >
> > > - { IMX290_REG_8BIT(0x3005), 0x01 },
> > > - { IMX290_REG_8BIT(0x3046), 0x01 },
> > > - { IMX290_REG_8BIT(0x3129), 0x00 },
> > > - { IMX290_REG_8BIT(0x317c), 0x00 },
> > > - { IMX290_REG_8BIT(0x31ec), 0x0e },
> > > - { IMX290_REG_8BIT(0x3441), 0x0c },
> > > - { IMX290_REG_8BIT(0x3442), 0x0c },
> > > - { IMX290_REG_8BIT(0x300a), 0xf0 },
> > > - { IMX290_REG_8BIT(0x300b), 0x00 },
> > > + { IMX290_ADBIT, IMX290_ADBIT_12BIT },
> > > + { IMX290_OUT_CTRL, IMX290_ODBIT_12BIT },
> > > + { IMX290_ADBIT1, IMX290_ADBIT1_12BIT },
> > > + { IMX290_ADBIT2, IMX290_ADBIT2_12BIT },
> > > + { IMX290_ADBIT3, IMX290_ADBIT3_12BIT },
> > > + { IMX290_CSI_DT_FMT, IMX290_CSI_DT_FMT_RAW12 },
> > > + { IMX290_BLKLEVEL, 240 },
> > >
> > > };
> > >
> > > /* supported link frequencies */
next prev parent reply other threads:[~2022-07-21 11:28 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-21 8:35 [PATCH 00/19] media: i2c: imx290: Miscellaneous improvements Laurent Pinchart
2022-07-21 8:35 ` [PATCH 01/19] media: i2c: imx290: Use device lock for the control handler Laurent Pinchart
2022-07-21 9:22 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 02/19] media: i2c: imx290: Print error code when I2C transfer fails Laurent Pinchart
2022-07-21 9:23 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 03/19] media: i2c: imx290: Specify HMAX values in decimal Laurent Pinchart
2022-07-21 9:18 ` Alexander Stein
2022-07-21 11:31 ` Laurent Pinchart
2022-07-21 11:54 ` Alexander Stein
2022-07-21 12:04 ` Laurent Pinchart
2022-07-21 8:35 ` [PATCH 04/19] media: i2c: imx290: Replace macro with explicit ARRAY_SIZE() Laurent Pinchart
2022-07-21 9:23 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 05/19] media: i2c: imx290: Drop imx290_write_buffered_reg() Laurent Pinchart
2022-07-21 9:24 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 06/19] media: i2c: imx290: Drop regmap cache Laurent Pinchart
2022-07-21 9:27 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 07/19] media: i2c: imx290: Support variable-sized registers Laurent Pinchart
2022-07-21 9:43 ` Alexander Stein
2022-07-21 10:54 ` Laurent Pinchart
2022-07-21 11:18 ` Alexander Stein
2022-07-21 11:25 ` Laurent Pinchart
2022-07-21 11:43 ` Alexander Stein
2022-07-22 14:37 ` Sakari Ailus
2022-07-23 23:06 ` Laurent Pinchart
2022-07-25 6:49 ` Alexander Stein
2022-08-23 1:08 ` Laurent Pinchart
2022-08-23 2:51 ` Laurent Pinchart
2022-08-23 7:19 ` Alexander Stein
2022-10-16 5:36 ` Laurent Pinchart
2022-07-21 8:35 ` [PATCH 08/19] media: i2c: imx290: Correct register sizes Laurent Pinchart
2022-07-21 8:35 ` [PATCH 09/19] media: i2c: imx290: Simplify error handling when writing registers Laurent Pinchart
2022-07-21 9:50 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 10/19] media: i2c: imx290: Define more register macros Laurent Pinchart
2022-07-21 10:00 ` Alexander Stein
2022-07-21 11:08 ` Laurent Pinchart
2022-07-21 11:28 ` Alexander Stein [this message]
2022-10-16 4:27 ` Laurent Pinchart
2022-07-21 8:35 ` [PATCH 11/19] media: i2c: imx290: Add exposure time control Laurent Pinchart
2022-07-21 10:01 ` Alexander Stein
2022-07-21 15:52 ` Dave Stevenson
2022-07-21 8:35 ` [PATCH 12/19] media: i2c: imx290: Fix max gain value Laurent Pinchart
2022-07-21 10:02 ` Alexander Stein
2022-07-21 16:08 ` Dave Stevenson
2022-10-16 4:51 ` Laurent Pinchart
2022-07-21 8:35 ` [PATCH 13/19] media: i2c: imx290: Split control initialization to separate function Laurent Pinchart
2022-07-21 10:03 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 14/19] media: i2c: imx290: Implement HBLANK and VBLANK controls Laurent Pinchart
2022-07-21 10:05 ` Alexander Stein
2022-07-21 11:17 ` Laurent Pinchart
2022-07-21 11:32 ` Alexander Stein
2022-07-21 16:37 ` Dave Stevenson
2022-10-16 6:10 ` Laurent Pinchart
2022-10-17 13:46 ` Dave Stevenson
2022-07-21 8:35 ` [PATCH 15/19] media: i2c: imx290: Create controls for fwnode properties Laurent Pinchart
2022-07-21 10:06 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 16/19] media: i2c: imx290: Move registers with fixed value to init array Laurent Pinchart
2022-07-21 10:08 ` Alexander Stein
2022-07-21 10:40 ` Laurent Pinchart
2022-07-21 11:08 ` Alexander Stein
2022-07-21 16:19 ` Dave Stevenson
2022-07-22 5:53 ` Alexander Stein
2022-07-22 9:10 ` Dave Stevenson
2022-07-21 8:35 ` [PATCH 17/19] media: i2c: imx290: Factor out format retrieval to separate function Laurent Pinchart
2022-07-21 10:11 ` Alexander Stein
2022-07-21 10:36 ` Laurent Pinchart
2022-07-21 11:12 ` Alexander Stein
2022-07-21 8:35 ` [PATCH 18/19] media: i2c: imx290: Add crop selection targets support Laurent Pinchart
2022-07-21 15:39 ` Dave Stevenson
2022-10-16 5:53 ` Laurent Pinchart
2022-07-21 8:35 ` [PATCH 19/19] media: i2c: imx290: Replace GAIN control with ANALOGUE_GAIN Laurent Pinchart
2022-07-21 10:11 ` Alexander Stein
2022-08-23 1:11 ` [PATCH 00/19] media: i2c: imx290: Miscellaneous improvements Laurent Pinchart
2022-10-10 10:31 ` Dave Stevenson
2022-10-16 5:37 ` Laurent Pinchart
2022-10-16 7:34 ` Dave Stevenson
2022-10-17 18:07 ` Dave Stevenson
2022-10-18 13:43 ` Dave Stevenson
2022-10-19 10:33 ` Sakari Ailus
2022-10-19 11:38 ` Dave Stevenson
2022-10-19 13:27 ` Sakari Ailus
2023-01-14 16:03 ` Laurent Pinchart
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