From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A04034B192; Thu, 26 Mar 2026 02:31:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774492295; cv=none; b=SEZavEapDCO17CCPmb2Dbe69zx7S8aDXHT/kjaC9c7i18aGODcww1/DNJ2AcZmferalDVrqKsc0hddeGdLEdayqv9lpDj2QSwJEKkIp+lyaLEXrws6I0VEQ1yHaTQ6X6alTWEWbWc8m4U3GNh2X+oUaVbZrke/27IDOF95Ki5ek= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774492295; c=relaxed/simple; bh=fZ5Ox8MgveDlNeJ5Qnhm8xIqwTl76EwuPnJAF739cT4=; h=Date:Content-Type:MIME-Version:From:Cc:To:In-Reply-To:References: Message-Id:Subject; b=DMDFlMqnoYIO8NWb7moMnDMsQ95rzROsfN+CXQfko0ApDRAfozqcJ5IgJ2OKmiura1eMjceN5qx1n0pyDJgw/US/6diOUu+P5XdfASRsKvxXLTxgFCwJe5yaj7zBEOn4zwM0CSgok1/iQgw6Q/qUuFRR9pWZVzy2hOLFCcWoSBQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GGETqvg9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GGETqvg9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 12DEAC4CEF7; Thu, 26 Mar 2026 02:31:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774492295; bh=fZ5Ox8MgveDlNeJ5Qnhm8xIqwTl76EwuPnJAF739cT4=; h=Date:From:Cc:To:In-Reply-To:References:Subject:From; b=GGETqvg9wjsKSXPq/9HNyBPXhlVBIEMLicJfeoWiWIxCTaTM6WWzLobusAN4qjWqr 7iaVJYBXHUyRbib0WDJml/I0NhpXvtL2WBL2kqBGrEv37M2CXJrLNexX1TlrPBtGWu N45mz8Rp3H+GPl0QKpBoR9ky8DLP1aSu6r3sDh0BYS21zVEar/Iw+/lA2TAynIoLQt teRm8669zag2bC5lzDDA1uCQSlzI2UVoghsyP2ymqLfmGWCGcxM4gG23SLJSWllbp8 1vS2kVPznvG5LfH3TllIAUz8ShWZBkLX4LLAMU5Q8wsFxzn5ZcZwBxQcMCrV/SIbuW dSvnIgey+0leg== Date: Wed, 25 Mar 2026 21:31:32 -0500 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: "Rob Herring (Arm)" Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Kishon Vijay Abraham I , Neil Armstrong , Conor Dooley , Bryan O'Donoghue , linux-media@vger.kernel.org, Vinod Koul , Vladimir Zapolskiy , linux-arm-msm@vger.kernel.org, Krzysztof Kozlowski To: Bryan O'Donoghue In-Reply-To: <20260326-x1e-csi2-phy-v5-1-0c0fc7f5c01b@linaro.org> References: <20260326-x1e-csi2-phy-v5-0-0c0fc7f5c01b@linaro.org> <20260326-x1e-csi2-phy-v5-1-0c0fc7f5c01b@linaro.org> Message-Id: <177449229278.811310.4497727247818461318.robh@kernel.org> Subject: Re: [PATCH v5 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema On Thu, 26 Mar 2026 01:04:43 +0000, Bryan O'Donoghue wrote: > Add a base schema initially compatible with x1e80100 to describe MIPI CSI2 > PHY devices. > > The hardware can support both CPHY, DPHY and a special split-mode DPHY. We > capture those modes as: > > - PHY_QCOM_CSI2_MODE_DPHY > - PHY_QCOM_CSI2_MODE_CPHY > - PHY_QCOM_CSI2_MODE_SPLIT_DPHY > > The CSIPHY devices have their own pinouts on the SoC as well as their own > individual voltage rails. > > The need to model voltage rails on a per-PHY basis leads us to define > CSIPHY devices as individual nodes. > > Two nice outcomes in terms of schema and DT arise from this change. > > 1. The ability to define on a per-PHY basis voltage rails. > 2. The ability to require those voltage. > > We have had a complete bodge upstream for this where a single set of > voltage rail for all CSIPHYs has been buried inside of CAMSS. > > Much like the I2C bus which is dedicated to Camera sensors - the CCI bus in > CAMSS parlance, the CSIPHY devices should be individually modelled. > > Signed-off-by: Bryan O'Donoghue > --- > .../bindings/phy/qcom,x1e80100-csi2-phy.yaml | 130 +++++++++++++++++++++ > include/dt-bindings/phy/phy-qcom-mipi-csi2.h | 15 +++ > 2 files changed, 145 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.example.dts:75.21-77.11: Warning (unit_address_vs_reg): /example-0/isp@acb7000: node has a unit name, but no reg or ranges property doc reference errors (make refcheckdocs): See https://patchwork.kernel.org/project/devicetree/patch/20260326-x1e-csi2-phy-v5-1-0c0fc7f5c01b@linaro.org The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.