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Wed, 12 Aug 2026 08:45:06 -0700 (PDT) X-Received: by 2002:a17:90b:1b0d:b0:38f:7f60:ba35 with SMTP id 98e67ed59e1d1-3930123788cmr6179918a91.5.1786549505589; Wed, 12 Aug 2026 08:45:05 -0700 (PDT) Received: from [192.168.0.172] ([183.83.139.112]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31cf3c08163sm11160525eec.7.2026.08.12.08.44.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Aug 2026 08:45:05 -0700 (PDT) Message-ID: <1a7c222a-617b-4dfd-a551-2c00115747a9@oss.qualcomm.com> Date: Wed, 12 Aug 2026 21:14:49 +0530 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/22] arm64: dts: qcom: hamoa: Reserve low IOVA range for Iris To: Rob Herring , Bryan O'Donoghue Cc: Vishnu Reddy , Dmitry Baryshkov , Dikshita Agarwal , Mauro Carvalho Chehab , Krzysztof Kozlowski , Conor Dooley , Stanimir Varbanov , Sakari Ailus , Abhinav Kumar , Stephan Gerhold , Bjorn Andersson , Stanimir Varbanov , Konrad Dybcio , Johan Hovold , Neil Armstrong , Loic Poulain , Jorge Ramirez-Ortiz , Mansur Alisha Shaik , Andy Gross , Rob Clark , Stephen Boyd , Yassine Oudjana , Pierre-Hugues Husson , Marc Gonzalez , cros-qcom-dts-watchers@chromium.org, Matthias Kaehlcke , Douglas Anderson , AngeloGioacchino Del Regno , Aniket Masule , Malathi Gottam , Rajendra Nayak , Jonathan Marek , Dikshita Agarwal , Renjiang Han , Krzysztof Kozlowski , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio , Krzysztof Kozlowski , Daniel J Blueman , stable@vger.kernel.org References: <20260807-iris_iova_600mb_fix-v1-0-3996f67e33f9@oss.qualcomm.com> <20260807-iris_iova_600mb_fix-v1-4-3996f67e33f9@oss.qualcomm.com> <20260807162405.GA896590-robh@kernel.org> <6ee7f32e-eb6c-e264-6f0d-541555f8fd62@oss.qualcomm.com> <56b3dfcf-b1ad-4192-8199-06c80cc5d124@kernel.org> Content-Language: en-US From: Vikash Garodia In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODEyMDEyOCBTYWx0ZWRfX9S78Udj/f2uy nMv/KkKXftRBjGeQygi7wgWxfGWFG4f+NJvLgYRI8DlUwYfkWTtUv3WSl5Tg2vhMr40T6R2Fxa1 ItYkN1UC1INvR8t1jYMuLbfSCxtE0ShEbBDBixzncev5amy5zIE3jur6U50AvCoJ8CVHWhm6l9r v8FHVDt+6hrXqsbgn+C8FV4BfaoCvhAgAN1hrLVBBGrbowHFrcL7+Or9FecvyAiEC8Nah1lDo7M wfhgsFJ/UIl9iMuSaVVZDhIrZo7g6rhoQE+i+YW11E6UhyqcysuH+PsxIbT18PaVJZtKboDH/Uz L7NAJwdT5GlbGCyx2coTZkDo4WNsRS24JuFIAk70B13v9PVpeYmK/Znbg9J13sp0PfwfaPmzO+I ZbKJNiIIYDvS0sHE3bT6vt+S7HNWeX2jpVzo10t29EVj7syssTjGyaILEhG8ZoFSSFNWfLvorLe 2Qzk9U1ub9YN7vuLHPg== X-Proofpoint-ORIG-GUID: dNrDYNlnSVGX3dcA4r4rBiIwh4ESqcMy X-Authority-Analysis: v=2.4 cv=TNJ1jVla c=1 sm=1 tr=0 ts=6a7c9503 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=vZaankvBGbqXg3MvYcFdyQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=NEAV23lmAAAA:8 a=YG64nluAAAAA:20 a=VwQbUJbxAAAA:8 a=t9ty7G3lAAAA:8 a=EUspDBNiAAAA:8 a=JoBr3x7BRt4YSxSGyWwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=CsAS6f0m0zARWR-uHzm3:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-GUID: dNrDYNlnSVGX3dcA4r4rBiIwh4ESqcMy X-Proofpoint-Spam-Info: AW1haW4tMjYwODEyMDEyOCBTYWx0ZWRfX2GZKHXYTiQB2 hmgMnv8t3o0GEyvWRX4GAf5sa/+HMyiEWSHoFDp7J0gaNpvjDj4GTXYBGTniziERtDYIJ7G1v8h 169++fsf3F9EtK8c8k+0hFNJJpKBuFA= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-12_04,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 phishscore=0 impostorscore=0 adultscore=0 suspectscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608120128 On 8/10/2026 7:17 PM, Rob Herring wrote: > On Sat, Aug 8, 2026 at 4:55 AM Bryan O'Donoghue wrote: >> >> On 08/08/2026 05:37, Vishnu Reddy wrote: >>> >>> On 8/7/2026 9:54 PM, Rob Herring wrote: >>>> On Fri, Aug 07, 2026 at 12:03:50PM +0300, Dmitry Baryshkov wrote: >>>>> On Fri, Aug 07, 2026 at 01:54:48PM +0530, Vikash Garodia wrote: >>>>>> From: Daniel J Blueman >>>>>> >>>>>> On X1-family hamoa platforms, the Iris VPU reserves IOVA addresses >>>>>> below 0x25800000 (600MB), primarily for secure non-pixel buffers. DMA >>>>>> into that range, from any other stream id would triggers unhandled SMMU >>>>>> page faults that cause spontaneous device reboots. This is readily >>>>>> reproduced with one or more browser tabs driving multiple concurrent >>>>>> video decode streams. >>>>>> >>>>>> Add a reserved-memory IOVA reservation node covering [0, 0x25800000] >>>>>> and reference it from the Iris node so the IOMMU layer keeps DMA >>>>>> allocations above that boundary. >>>>>> >>>>>> Link: https://github.com/qualcomm-linux/kernel-topics/issues/1157#issuecomment-4458933574 >>>>>> Fixes: 9065340ac04d ("arm64: dts: qcom: x1e80100: Add IRIS video codec") >>>>>> Cc: stable@vger.kernel.org >>>>>> Signed-off-by: Daniel J Blueman >>>>>> Signed-off-by: Vikash Garodia >>>>>> --- >>>>>> arch/arm64/boot/dts/qcom/hamoa.dtsi | 13 ++++++++++++- >>>>>> 1 file changed, 12 insertions(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi >>>>>> index 8a96ea1bdb9c4c409b2af997680d8c13fed0643e..87f424765d513c97b06303bceb75ca9f176d2ace 100644 >>>>>> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi >>>>>> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi >>>>>> @@ -666,6 +666,17 @@ smem_mem: smem@ffe00000 { >>>>>> hwlocks = <&tcsr_mutex 3>; >>>>>> no-map; >>>>>> }; >>>>>> + >>>>>> + /* >>>>>> + * The Iris VPU reserves IOVA below 0x25800000 (600MB), >>>>>> + * primarily for non-pixel buffers using different Stream IDs. >>>>>> + * DMA into that range triggers unhandled SMMU faults and >>>>>> + * spontaneous reboots, so reserve it to keep IOMMU >>>>>> + * allocations above this boundary. >>>>>> + */ >>>>>> + iris_iova: iris-iova { >>>>>> + iommu-addresses = <&iris 0x0 0x0 0x0 0x25800000>; >>>>>> + }; >>>>>> }; >>>>>> >>>>>> qup_opp_table_100mhz: opp-table-qup100mhz { >>>>>> @@ -5439,7 +5450,7 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, >>>>>> interconnect-names = "cpu-cfg", >>>>>> "video-mem"; >>>>>> >>>>>> - memory-region = <&video_mem>; >>>>>> + memory-region = <&video_mem>, <&iris_iova>; >>>>> I don't like the idea of this series, because it _again_ doesn't tell us >>>>> the truth about the hardware. This typicall ends up with bigger problems >>>>> later on, when it starts to affect other bits and pieces. >>>>> >>>>> I don't want to NAK it, but I'd strongly ask to reconsider it. >>>> I think this is an abuse of /reserved-memory. reserved-memory is >>>> reserved *physical* memory. Reserved IOVA is a property on top of that. >>>> I'm surprised this passes validation. If it does, I may go fix that. >>> >>> As per the reserved-memory.yaml schema document, the iommu-addresses >>> property for IOVA reservation into /reserved-memory is allowed — it's >>> documented for IOVA carveout reservations: >>> https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/reserved-memory/reserved-memory.yaml#L56 >> I think that is an entirely reasonable reading of the text >> >> Quote: >> >> "If no "reg" property is specified, the "iommu-addresses" property >> defines carveout regions in the IOVA space for the given device. This >> can be useful if a certain memory region should not be mapped through >> the IOMMU." >> >> Which is exactly what this series does. Excludes a specific IOVA range >> from being allocated for this device. > > But if "iommu-addresses" is the only property of the reserved memory, > why put this property in reserved-memory rather than directly in the > device's node? I'm only questioning where is the right place to > describe a reserved IOVA. > a single property node vs multi-property node should not be the reason to decide the place i believe, rather having them all under reserve-memory keeps all reservation at one place instead of scattering it all over. Regards, Vikash > Rob