From: "Daniel Glöckner" <daniel-gl@gmx.net>
To: Robert Longbottom <rongblor@googlemail.com>
Cc: "linux-media@vger.kernel.org" <linux-media@vger.kernel.org>
Subject: Re: Conexant PCI-8604PW 4 channel BNC Video capture card (bttv)
Date: Sun, 26 Jan 2014 13:55:53 +0100 [thread overview]
Message-ID: <20140126125552.GA26918@minime.bse> (raw)
In-Reply-To: <52E4EFBB.7070504@googlemail.com>
On Sun, Jan 26, 2014 at 11:21:31AM +0000, Robert Longbottom wrote:
> 0F0 000000F9 PLL_F_LO
> 0F4 000000DC PLL_F_HI
> 0F8 0000008E PLL_XCI
The PLL is enabled and configured for a 28.63636MHz input clock.
With the default board config these registers are not touched
at all, so this must be a remnant of testing with another board
number. Please repeat with pll=35,35,35,35 .
Daniel
next prev parent reply other threads:[~2014-01-26 12:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-20 21:39 Conexant PCI-8604PW 4 channel BNC Video capture card (bttv) Robert Longbottom
2014-01-20 22:55 ` Andy Walls
2014-01-21 9:27 ` Robert Longbottom
2014-01-21 10:19 ` Daniel Glöckner
2014-01-21 19:49 ` Robert Longbottom
2014-01-21 20:59 ` Robert Longbottom
2014-01-22 11:53 ` Daniel Glöckner
2014-01-22 13:09 ` Robert Longbottom
2014-01-22 13:50 ` Daniel Glöckner
2014-01-22 18:15 ` Robert Longbottom
2014-01-23 13:27 ` Daniel Glöckner
2014-01-23 14:29 ` Robert Longbottom
2014-01-25 15:23 ` Daniel Glöckner
2014-01-26 11:21 ` Robert Longbottom
2014-01-26 12:55 ` Daniel Glöckner [this message]
2014-01-26 16:23 ` Robert Longbottom
2014-01-27 3:20 ` Daniel Glöckner
2014-01-27 20:55 ` Robert Longbottom
2014-01-28 2:02 ` Daniel Glöckner
2014-02-05 13:16 ` Robert Longbottom
2014-02-11 13:38 ` Daniel Glöckner
2014-02-11 18:25 ` Robert Longbottom
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