From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-wr0-f195.google.com ([209.85.128.195]:44829 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753392AbeERJ2n (ORCPT ); Fri, 18 May 2018 05:28:43 -0400 Received: by mail-wr0-f195.google.com with SMTP id y15-v6so8455539wrg.11 for ; Fri, 18 May 2018 02:28:43 -0700 (PDT) From: Rui Miguel Silva To: mchehab@kernel.org, sakari.ailus@linux.intel.com, Steve Longerbeam , Philipp Zabel , Rob Herring Cc: linux-media@vger.kernel.org, devel@driverdev.osuosl.org, Shawn Guo , Fabio Estevam , devicetree@vger.kernel.org, Greg Kroah-Hartman , Ryan Harkin , linux-clk@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v5 08/12] ARM: dts: imx7s: add multiplexer controls Date: Fri, 18 May 2018 10:28:02 +0100 Message-Id: <20180518092806.3829-9-rui.silva@linaro.org> In-Reply-To: <20180518092806.3829-1-rui.silva@linaro.org> References: <20180518092806.3829-1-rui.silva@linaro.org> Sender: linux-media-owner@vger.kernel.org List-ID: The IOMUXC General Purpose Register has bitfield to control video bus multiplexer to control the CSI input between the MIPI-CSI2 and parallel interface. Add that register and mask. Signed-off-by: Rui Miguel Silva Reviewed-by: Philipp Zabel --- arch/arm/boot/dts/imx7s.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 67450ad89940..3590dab529f9 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -520,8 +520,14 @@ gpr: iomuxc-gpr@30340000 { compatible = "fsl,imx7d-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x14 0x00000010>; + }; }; ocotp: ocotp-ctrl@30350000 { -- 2.17.0