From: Philipp Zabel <p.zabel@pengutronix.de>
To: linux-media@vger.kernel.org
Cc: Steve Longerbeam <slongerbeam@gmail.com>,
Nicolas Dufresne <nicolas@ndufresne.ca>,
kernel@pengutronix.de
Subject: [PATCH v2 14/16] gpu: ipu-v3: image-convert: add some ASCII art to the exposition
Date: Thu, 19 Jul 2018 17:30:40 +0200 [thread overview]
Message-ID: <20180719153042.533-15-p.zabel@pengutronix.de> (raw)
In-Reply-To: <20180719153042.533-1-p.zabel@pengutronix.de>
Visualize the scaling and rotation pipeline with some ASCII art
diagrams. Remove the FIXME comment about missing seam prevention.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 39 +++++++++++++++++++-------
1 file changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-image-convert.c b/drivers/gpu/ipu-v3/ipu-image-convert.c
index a0d9c154c951..93eaeacf777e 100644
--- a/drivers/gpu/ipu-v3/ipu-image-convert.c
+++ b/drivers/gpu/ipu-v3/ipu-image-convert.c
@@ -37,17 +37,36 @@
* when double_buffering boolean is set).
*
* Note that the input frame must be split up into the same number
- * of tiles as the output frame.
+ * of tiles as the output frame:
*
- * FIXME: at this point there is no attempt to deal with visible seams
- * at the tile boundaries when upscaling. The seams are caused by a reset
- * of the bilinear upscale interpolation when starting a new tile. The
- * seams are barely visible for small upscale factors, but become
- * increasingly visible as the upscale factor gets larger, since more
- * interpolated pixels get thrown out at the tile boundaries. A possilble
- * fix might be to overlap tiles of different sizes, but this must be done
- * while also maintaining the IDMAC dma buffer address alignment and 8x8 IRT
- * alignment restrictions of each tile.
+ * +---------+-----+
+ * +-----+---+ | A | B |
+ * | A | B | | | |
+ * +-----+---+ --> +---------+-----+
+ * | C | D | | C | D |
+ * +-----+---+ | | |
+ * +---------+-----+
+ *
+ * Clockwise 90° rotations are handled by first rescaling into a
+ * reusable temporary tile buffer and then rotating with the 8x8
+ * block rotator, writing to the correct destination:
+ *
+ * +-----+-----+
+ * | | |
+ * +-----+---+ +---------+ | C | A |
+ * | A | B | | A,B, | | | | |
+ * +-----+---+ --> | C,D | | --> | | |
+ * | C | D | +---------+ +-----+-----+
+ * +-----+---+ | D | B |
+ * | | |
+ * +-----+-----+
+ *
+ * If the 8x8 block rotator is used, horizontal or vertical flipping
+ * is done during the rotation step, otherwise flipping is done
+ * during the scaling step.
+ * With rotation or flipping, tile order changes between input and
+ * output image. Tiles are numbered row major from top left to bottom
+ * right for both input and output image.
*/
#define MAX_STRIPES_W 4
--
2.18.0
next prev parent reply other threads:[~2018-07-19 16:14 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-19 15:30 [PATCH v2 00/16] i.MX media mem2mem scaler Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 01/16] gpu: ipu-v3: ipu-ic: allow to manually set resize coefficients Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 02/16] gpu: ipu-v3: image-convert: prepare for per-tile configuration Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 03/16] gpu: ipu-v3: image-convert: calculate per-tile resize coefficients Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 04/16] gpu: ipu-v3: image-convert: reconfigure IC per tile Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 05/16] gpu: ipu-v3: image-convert: store tile top/left position Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 06/16] gpu: ipu-v3: image-convert: calculate tile dimensions and offsets outside fill_image Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 07/16] gpu: ipu-v3: image-convert: move tile alignment helpers Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 08/16] gpu: ipu-v3: image-convert: select optimal seam positions Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 09/16] gpu: ipu-v3: image-convert: fix debug output for varying tile sizes Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 10/16] gpu: ipu-v3: image-convert: relax tile width alignment for NV12 and NV16 Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 11/16] gpu: ipu-v3: image-convert: relax input alignment restrictions Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 12/16] gpu: ipu-v3: image-convert: relax output " Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 13/16] gpu: ipu-v3: image-convert: fix bytesperline adjustment Philipp Zabel
2018-07-19 15:30 ` Philipp Zabel [this message]
2018-07-19 15:30 ` [PATCH v2 15/16] gpu: ipu-v3: image-convert: disable double buffering if necessary Philipp Zabel
2018-07-19 15:30 ` [PATCH v2 16/16] media: imx: add mem2mem device Philipp Zabel
2018-07-22 18:30 ` [PATCH v2 00/16] i.MX media mem2mem scaler Steve Longerbeam
2018-07-22 19:11 ` Steve Longerbeam
2018-07-23 9:29 ` Philipp Zabel
2018-07-23 9:42 ` Philipp Zabel
2018-07-23 13:26 ` Philipp Zabel
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