From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-wr1-f66.google.com ([209.85.221.66]:32915 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388952AbeHALdA (ORCPT ); Wed, 1 Aug 2018 07:33:00 -0400 From: Philipp Rossak To: mchehab@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk, sean@mess.org, p.zabel@pengutronix.de Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH v7 1/4] ARM: dts: sun8i: a83t: Add the cir pin for the A83T Date: Wed, 1 Aug 2018 11:47:58 +0200 Message-Id: <20180801094801.26627-2-embed3d@gmail.com> In-Reply-To: <20180801094801.26627-1-embed3d@gmail.com> References: <20180801094801.26627-1-embed3d@gmail.com> Sender: linux-media-owner@vger.kernel.org List-ID: The CIR Pin of the A83T is located at PL12. Signed-off-by: Philipp Rossak Acked-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 2be23d600957..afed6c0dea6f 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -1004,6 +1004,11 @@ interrupt-controller; #interrupt-cells = <3>; + r_cir_pin: r-cir-pin { + pins = "PL12"; + function = "s_cir_rx"; + }; + r_rsb_pins: r-rsb-pins { pins = "PL0", "PL1"; function = "s_rsb"; -- 2.11.0