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[217.229.16.64]) by smtp.gmail.com with ESMTPSA id f35sm4134936edd.80.2018.12.11.01.38.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 11 Dec 2018 01:38:08 -0800 (PST) Date: Tue, 11 Dec 2018 10:38:07 +0100 From: Thierry Reding To: Hans Verkuil Cc: Hans Verkuil , Mauro Carvalho Chehab , Jonathan Hunter , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH 1/2] media: tegra-cec: Support Tegra186 and Tegra194 Message-ID: <20181211093807.GA14426@ulmo> References: <20181210160038.16122-1-thierry.reding@gmail.com> <643e8da6-a8ed-145a-604d-f028e501add9@xs4all.nl> <20181210205945.GB325@mithrandir> <96df2b5f-e388-b933-8823-c718290bd5e3@xs4all.nl> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="PNTmBPCT7hxwcZjr" Content-Disposition: inline In-Reply-To: <96df2b5f-e388-b933-8823-c718290bd5e3@xs4all.nl> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org --PNTmBPCT7hxwcZjr Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Dec 11, 2018 at 10:19:48AM +0100, Hans Verkuil wrote: > On 12/10/18 9:59 PM, Thierry Reding wrote: > > On Mon, Dec 10, 2018 at 06:07:10PM +0100, Hans Verkuil wrote: > >> Hi Thierry, > >> > >> On 12/10/18 5:00 PM, Thierry Reding wrote: > >>> From: Thierry Reding > >>> > >>> The CEC controller found on Tegra186 and Tegra194 is the same as on > >>> earlier generations. > >> > >> Well... at least for the Tegra186 there is a problem that needs to be = addressed first. > >> No idea if this was solved for the Tegra194, it might be present there= as well. > >> > >> The Tegra186 hardware connected the CEC lines of both HDMI outputs tog= ether. This is > >> a HW bug, and it means that only one of the two HDMI outputs can use t= he CEC block. > >=20 > > I don't know where you got that information from, but I can't find any > > indication of that in the documentation. My understanding is that there > > is a single CEC block that is completely independent and it is merely a > > decision of the board designer where to connect it. I'm not aware of any > > boards that expose more than a single CEC. >=20 > Sorry, my memory was not completely correct. >=20 > The problem is that the 186 can be configured with two HDMI outputs, but = it has > only one CEC block. So CEC can be used for only one of the two. I checked= the TRM > for the Tegra194 and that has up to four HDMI outputs, but still only one= CEC > block. >=20 > And yes, it is the responsibility for the board designer to hook up the C= EC pin > to only one of the outputs, but the TRM never explicitly mentions this an= d given > the general lack of knowledge about CEC it wouldn't surprise me at all if= there > will be wrong board designs. >=20 > But be that as it may, the core problem remains: you cannot allow multiple > HDMI outputs to be connected to the same CEC device. >=20 > However, I now realize that your patches will actually work fine since ea= ch > HDMI connector tries to get a cec notifier for its own HDMI device, but t= he > tegra-cec driver will only register a notifier for the HDMI device pointed > to by the hdmi-phandle property. So only one of the HDMI devices will act= ually > get a working CEC. >=20 > Although if board designers mess this up and connect multiple CEC lines to > the same CEC pin, this would still break, but there is nothing that can be > done about that. I still believe the TRM should have made this clear since > it is not obvious. Even better would be to have the same number of CEC bl= ocks > as there are configurable HDMI outputs. Typically, if you support CEC on = one > HDMI output, you want to support it for all. And today that's not possible > without adding external CEC devices (as we - Cisco - do). I wasn't aware that anyone was using a Tegra with support for multiple HDMI outputs. Do you have a contact that you can forward this kind of request to? It certainly sounds like something that would be useful to add in future chips if there's a customer need. I can also forward this internally, but I expect it to have more weight coming directly from Cisco. =3D) > Apologies for the confusion, I should never send emails after 5pm :-) No worries. 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