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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id l16sm5699504otr.13.2019.01.21.09.13.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 21 Jan 2019 09:13:49 -0800 (PST) Date: Mon, 21 Jan 2019 11:13:48 -0600 From: Rob Herring To: Michael Tretter Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, mchehab@kernel.org, tfiga@chromium.org Subject: Re: [PATCH v2 1/3] media: dt-bindings: media: document allegro-dvt bindings Message-ID: <20190121171348.GA4532@bogus> References: <20190118133716.29288-1-m.tretter@pengutronix.de> <20190118133716.29288-2-m.tretter@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190118133716.29288-2-m.tretter@pengutronix.de> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org On Fri, Jan 18, 2019 at 02:37:14PM +0100, Michael Tretter wrote: > Add device-tree bindings for the Allegro DVT video IP core found on the > Xilinx ZynqMP EV family. > > Signed-off-by: Michael Tretter > --- > Changes since v1: > none > > --- > .../devicetree/bindings/media/allegro.txt | 35 +++++++++++++++++++ > 1 file changed, 35 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/allegro.txt > > diff --git a/Documentation/devicetree/bindings/media/allegro.txt b/Documentation/devicetree/bindings/media/allegro.txt > new file mode 100644 > index 000000000000..765f4b0c1a57 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/allegro.txt > @@ -0,0 +1,35 @@ > +Device-tree bindings for the Allegro DVT video IP codecs present in the Xilinx > +ZynqMP SoC. The IP core may either be a H.264/H.265 encoder or H.264/H.265 > +decoder ip core. > + > +Each actual codec engines is controlled by a microcontroller (MCU). Host > +software uses a provided mailbox interface to communicate with the MCU. The > +MCU share an interrupt. > + > +Required properties: > + - compatible: value should be one of the following > + "allegro,al5e-1.1", "allegro,al5e": encoder IP core > + "allegro,al5d-1.1", "allegro,al5d": decoder IP core > + - reg: base and length of the memory mapped register region and base and > + length of the memory mapped sram > + - reg-names: must include "regs" and "sram" > + - interrupts: shared interrupt from the MCUs to the processing system > + - interrupt-names: "vcu_host_interrupt" No point in having *-names when there is only one entry. > + > +Example: > + al5e: al5e@a0009000 { video-codec as suggested. > + compatible = "allegro,al5e"; Doesn't match the documentation above. > + reg = <0 0xa0009000 0 0x1000>, > + <0 0xa0000000 0 0x8000>; > + reg-names = "regs", "sram"; > + interrupt-names = "vcu_host_interrupt"; > + interrupts = <0 96 4>; > + }; > + al5d: al5d@a0029000 { > + compatible = "allegro,al5d"; > + reg = <0 0xa0029000 0 0x1000>, > + <0 0xa0020000 0 0x8000>; > + reg-names = "regs", "sram"; > + interrupt-names = "vcu_host_interrupt"; > + interrupts = <0 96 4>; > + }; > -- > 2.20.1 >