From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5EDAC4321B for ; Tue, 11 Jun 2019 03:54:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 874E22080A for ; Tue, 11 Jun 2019 03:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391033AbfFKDx7 (ORCPT ); Mon, 10 Jun 2019 23:53:59 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:42322 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2391026AbfFKDx7 (ORCPT ); Mon, 10 Jun 2019 23:53:59 -0400 X-UUID: dc7bae460cf94e41ace929a04685e9d7-20190611 X-UUID: dc7bae460cf94e41ace929a04685e9d7-20190611 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2085832015; Tue, 11 Jun 2019 11:53:51 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 11 Jun 2019 11:53:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 11 Jun 2019 11:53:49 +0800 From: Jungo Lin To: , , , , CC: , , , , , , , , , , , , , Subject: [RFC,v3 1/9] dt-bindings: mt8183: Added camera ISP Pass 1 Date: Tue, 11 Jun 2019 11:53:36 +0800 Message-ID: <20190611035344.29814-2-jungo.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190611035344.29814-1-jungo.lin@mediatek.com> References: <20190611035344.29814-1-jungo.lin@mediatek.com> Reply-To: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org This patch adds DT binding document for the Pass 1 (P1) unit in Mediatek's camera ISP system. The Pass 1 unit grabs the sensor data out from the sensor interface, applies ISP image effects from tuning data and outputs the image data or statistics data to DRAM. Signed-off-by: Jungo Lin --- .../bindings/media/mediatek,camisp.txt | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,camisp.txt diff --git a/Documentation/devicetree/bindings/media/mediatek,camisp.txt b/Documentation/devicetree/bindings/media/mediatek,camisp.txt new file mode 100644 index 000000000000..50a8b4d9ac8e --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,camisp.txt @@ -0,0 +1,57 @@ +* Mediatek Image Signal Processor Pass 1 (ISP P1) + +The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out +from the sensor interface, applies ISP effects from tuning data and outputs +the image data and statistics data to DRAM. Furthermore, Pass 1 unit has +the ability to output two different resolutions frames at the same time to +increase the performance of the camera application. + +Required properties: +- compatible: Must be "mediatek,mt8183-camisp" for MT8183. +- reg: Physical base address of the camera function block registers and + length of memory mapped region. Must contain an entry for each entry + in reg-names. +- reg-names: Must include the following entries: + "cam_sys": Camsys base function block + "cam_uni": Camera UNI function block + "cam_a": Single camera ISP P1 hardware module A + "cam_b": Single camera ISP P1 hardware module B +- interrupts: Interrupt number to the CPU. +- iommus: Shall point to the respective IOMMU block with master port + as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. +- clocks: A list of phandle and clock specifier pairs as listed + in clock-names property, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- clock-names: Must be "camsys_cam_cgpdn" and "camsys_camtg_cgpdn". +- mediatek,larb: Must contain the local arbiters in the current SoCs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. +- mediatek,scp : The node of system control processor (SCP), see + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details. + +Example: +SoC specific DT entry: + + camisp: camisp@1a000000 { + compatible = "mediatek,mt8183-camisp", "syscon"; + reg = <0 0x1a000000 0 0x1000>, + <0 0x1a003000 0 0x1000>, + <0 0x1a004000 0 0x2000>, + <0 0x1a006000 0 0x2000>; + reg-names = "cam_sys", + "cam_uni", + "cam_a", + "cam_b"; + interrupts = , + , + ; + iommus = <&iommu M4U_PORT_CAM_IMGO>; + clocks = <&camsys CLK_CAM_CAM>, + <&camsys CLK_CAM_CAMTG>; + clock-names = "camsys_cam_cgpdn", + "camsys_camtg_cgpdn"; + mediatek,larb = <&larb3>, + <&larb6>; + mediatek,scp = <&scp>; + }; \ No newline at end of file -- 2.18.0