From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC397C433E0 for ; Tue, 19 May 2020 11:57:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D67112072C for ; Tue, 19 May 2020 11:57:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728647AbgESL5O (ORCPT ); Tue, 19 May 2020 07:57:14 -0400 Received: from mga14.intel.com ([192.55.52.115]:51524 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726949AbgESL5O (ORCPT ); Tue, 19 May 2020 07:57:14 -0400 IronPort-SDR: NqNHNWuUlddp6v9r0jTsQr38jUf+IMK28lRvyvxyVW2eXuK4J6evY6sC1O8d37Kq8YHNXDGDNU KPsgC35sGfeQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2020 04:57:13 -0700 IronPort-SDR: jyV9rlo0jY05dtLVE84kx6AZSS4ovmpPrjaCPfmSvzq3tkFF4M5NtqoIwUxWRHU5QFlp7wjYoZ ZRhzK7on77fg== X-IronPort-AV: E=Sophos;i="5.73,410,1583222400"; d="scan'208";a="253221285" Received: from paasikivi.fi.intel.com ([10.237.72.42]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2020 04:57:09 -0700 Received: by paasikivi.fi.intel.com (Postfix, from userid 1000) id 6918E20CEF; Tue, 19 May 2020 14:57:07 +0300 (EEST) Date: Tue, 19 May 2020 14:57:07 +0300 From: Sakari Ailus To: Roman Kovalivskyi Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Luis Oliveira , Niklas =?iso-8859-1?Q?S=F6derlund?= , Jacopo Mondi , Michael Rodin , Mauro Carvalho Chehab , Hugues Fruchet , Maxime Ripard , Adam Ford , Todor Tomov , Suresh Udipi , Andrew Gabbasov , Eugeniu Rosca , Dave Stevenson Subject: Re: [PATCH v2 3/6] media: ov5647: Add support for non-continuous clock mode Message-ID: <20200519115707.GK20066@paasikivi.fi.intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Hi Roman, On Tue, May 19, 2020 at 04:16:18AM +0300, Roman Kovalivskyi wrote: > From: Dave Stevenson > > The driver was only supporting continuous clock mode > although this was not stated anywhere. > Non-continuous clock saves a small amount of power and > on some SoCs is easier to interface with. > > Signed-off-by: Dave Stevenson > Signed-off-by: Roman Kovalivskyi > --- > drivers/media/i2c/ov5647.c | 25 ++++++++++++++++++++++--- > 1 file changed, 22 insertions(+), 3 deletions(-) > > diff --git a/drivers/media/i2c/ov5647.c b/drivers/media/i2c/ov5647.c > index 796cc80f8ee1..10f35c637f91 100644 > --- a/drivers/media/i2c/ov5647.c > +++ b/drivers/media/i2c/ov5647.c > @@ -44,6 +44,7 @@ > #define PWDN_ACTIVE_DELAY_MS 20 > > #define MIPI_CTRL00_CLOCK_LANE_GATE BIT(5) > +#define MIPI_CTRL00_LINE_SYNC_ENABLE BIT(4) > #define MIPI_CTRL00_BUS_IDLE BIT(2) > #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0) > > @@ -95,6 +96,7 @@ struct ov5647 { > int power_count; > struct clk *xclk; > struct gpio_desc *pwdn; > + bool is_clock_contiguous; > }; > > static inline struct ov5647 *to_state(struct v4l2_subdev *sd) > @@ -274,9 +276,15 @@ static int ov5647_set_virtual_channel(struct v4l2_subdev *sd, int channel) > > static int ov5647_stream_on(struct v4l2_subdev *sd) > { > + struct ov5647 *ov5647 = to_state(sd); > + u8 val = MIPI_CTRL00_BUS_IDLE; > int ret; > > - ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_BUS_IDLE); > + if (ov5647->is_clock_contiguous) > + val |= MIPI_CTRL00_CLOCK_LANE_GATE | > + MIPI_CTRL00_LINE_SYNC_ENABLE; > + > + ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, val); > if (ret < 0) > return ret; > > @@ -573,7 +581,7 @@ static const struct v4l2_subdev_internal_ops ov5647_subdev_internal_ops = { > .open = ov5647_open, > }; > > -static int ov5647_parse_dt(struct device_node *np) > +static int ov5647_parse_dt(struct ov5647 *sensor, struct device_node *np) > { > struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 }; > struct device_node *ep; > @@ -586,6 +594,17 @@ static int ov5647_parse_dt(struct device_node *np) > > ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg); > Extra newline. > + if (!ret) { > + of_node_put(ep); > + of_node_put(np); Why to put np as well? > + return ret; Please add a label at the end; it makes error handling easier. > + } > + > + if (bus_cfg.bus_type == V4L2_MBUS_CSI2_DPHY > + || bus_cfg.bus_type == V4L2_MBUS_CSI2_CPHY) I bet this device is D-PHY only. > + sensor->is_clock_contiguous = bus_cfg.bus.mipi_csi2.flags > + & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK; Now that you're making use of bus specific parameters, please set the bus type first before calling v4l2_fwnode_endpoint_parse(). > + > of_node_put(ep); > return ret; > } > @@ -604,7 +623,7 @@ static int ov5647_probe(struct i2c_client *client) > return -ENOMEM; > > if (IS_ENABLED(CONFIG_OF) && np) { > - ret = ov5647_parse_dt(np); > + ret = ov5647_parse_dt(sensor, np); > if (ret) { > dev_err(dev, "DT parsing error: %d\n", ret); > return ret; -- Kind regards, Sakari Ailus