From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39800C433EF for ; Tue, 15 Feb 2022 11:01:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236885AbiBOLBc (ORCPT ); Tue, 15 Feb 2022 06:01:32 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:37816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236830AbiBOLB2 (ORCPT ); Tue, 15 Feb 2022 06:01:28 -0500 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39A39F9F83; Tue, 15 Feb 2022 03:01:19 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:6d7b:ae43:289b:7e7c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 79BB61F444FF; Tue, 15 Feb 2022 11:01:17 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1644922878; bh=HT0GtBSTdWO+3cmZvtUx1T5UmoQIqfWc6rs9UqOp43k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hXbWKlN/yX78SrDsorfkisEL/5KOpc3MZyW0r4/gfXL7mnM6y0x72mTSnuFylBTzg lo/wi5BTrK5ZwYf6HhuM2+/EOEvZVHnc7F941MMR+N977Ht+SIADoDYG9jPLwPUFS7 j+UjOkKN8mMewTJ9BxoHvR3j8Qs3YmJyUDo6sWgvUoOVxuwiUNO0eKloImne8fDFeW Td0J6w2WmMaJkPzAKoEEYzHtFq2p9GL5qLafN8y3mfhLY51gGu0NLevll5rt1xs2Es erIiIovqSi/9g4Bjaw2DdctyA/iwzXJdZ8dcLjExZm9zmKowEQZub0FhROu6yPomll pkS9SugwLOtnw== From: Benjamin Gaignard To: mchehab@kernel.org, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, hverkuil-cisco@xs4all.nl, jonas@kwiboo.se, nicolas@ndufresne.ca Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, knaerzche@gmail.com, jc@kynesim.co.uk, Benjamin Gaignard Subject: [RFC v2 8/8] media: uapi: Change data_bit_offset definition Date: Tue, 15 Feb 2022 12:01:03 +0100 Message-Id: <20220215110103.241297-9-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220215110103.241297-1-benjamin.gaignard@collabora.com> References: <20220215110103.241297-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org 'F.7.3.6.1 General slice segment header syntax' section of HEVC specification describes that a slice header always end byte aligned, therefore we only need to provide the data offset in byte. Signed-off-by: Benjamin Gaignard --- Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 4 ++-- drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 2 +- include/uapi/linux/v4l2-controls.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 679595e94643..d5bdc2359b88 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2966,8 +2966,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - :widths: 1 1 2 * - __u32 - - ``data_bit_offset`` - - Offset (in bits) to the video data in the current slice data. + - ``data_byte_offset`` + - Offset (in byte) to the video data in the current slice data. * - __u8 - ``nal_unit_type`` - diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index db8c7475eeb8..81c4362ddbf4 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -402,7 +402,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset * 8); /* Bitstream parameters. */ diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 700e6cce958c..6968b5888607 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -2458,7 +2458,7 @@ struct v4l2_hevc_pred_weight_table { #define V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT (1ULL << 9) struct v4l2_ctrl_hevc_slice_params { - __u32 data_bit_offset; + __u32 data_byte_offset; /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ __u8 nal_unit_type; -- 2.32.0