Re: [PATCH v3 4/4] media: i2c: add MAX96714 driver

[kernel test robot <lkp@intel.com>]

Hi Julien,

kernel test robot noticed the following build errors:

[auto build test ERROR on media-tree/master]
[also build test ERROR on linuxtv-media-stage/master linus/master next-20240112]
[cannot apply to sailus-media-tree/streams]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Julien-Massot/dt-bindings-media-add-Maxim-MAX96717F-GMSL2-Serializer/20240111-210740
base:   git://linuxtv.org/media_tree.git master
patch link:    https://lore.kernel.org/r/20240111130349.2776699-5-julien.massot%40collabora.com
patch subject: [PATCH v3 4/4] media: i2c: add MAX96714 driver
config: i386-randconfig-r071-20240112 (https://download.01.org/0day-ci/archive/20240113/202401131916.MpdR8A2O-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240113/202401131916.MpdR8A2O-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401131916.MpdR8A2O-lkp@intel.com/

All errors (new ones prefixed by >>):

   ld: drivers/media/i2c/max96714.o: in function `max96714_parse_dt_txport':
>> drivers/media/i2c/max96714.c:827: undefined reference to `__moddi3'
   ld: drivers/media/i2c/max96714.o: in function `max96714_init_tx_port':
>> drivers/media/i2c/max96714.c:725: undefined reference to `__udivdi3'


vim +827 drivers/media/i2c/max96714.c

   714	
   715	static int max96714_init_tx_port(struct max96714_priv *priv)
   716	{
   717		struct v4l2_mbus_config_mipi_csi2 *mipi;
   718		unsigned long lanes_used = 0;
   719		u8 val, lane;
   720		int ret;
   721	
   722		ret = max96714_disable_tx_port(priv);
   723	
   724		mipi = &priv->vep.bus.mipi_csi2;
 > 725		val = *priv->vep.link_frequencies * 2 / MHZ(100);
   726	
   727		cci_update_bits(priv->regmap, MAX96714_BACKTOP25,
   728				CSI_DPLL_FREQ_MASK, val, &ret);
   729	
   730		val = FIELD_PREP(MAX96714_CSI2_LANE_CNT_MASK, mipi->num_data_lanes - 1);
   731		cci_update_bits(priv->regmap, MAX96714_MIPI_LANE_CNT,
   732				MAX96714_CSI2_LANE_CNT_MASK, val, &ret);
   733	
   734		/* lanes polarity */
   735		val = 0;
   736		for (lane = 0; lane < mipi->num_data_lanes + 1; lane++) {
   737			if (!mipi->lane_polarities[lane])
   738				continue;
   739			if (lane == 0)
   740				/* clock lane */
   741				val |= BIT(5);
   742			else if (lane < 3)
   743				/* Lane D0 and D1 */
   744				val |= BIT(lane - 1);
   745			else
   746				/* D2 and D3 */
   747				val |= BIT(lane);
   748		}
   749	
   750		cci_update_bits(priv->regmap, MAX96714_MIPI_POLARITY,
   751				MAX96714_MIPI_POLARITY_MASK, val, &ret);
   752	
   753		/* lanes mapping */
   754		val = 0;
   755		for (lane = 0; lane < mipi->num_data_lanes; lane++) {
   756			val |= (mipi->data_lanes[lane] - 1) << (lane * 2);
   757			lanes_used |= BIT(mipi->data_lanes[lane] - 1);
   758		}
   759	
   760		/* Unused lanes need to be mapped as well to not have
   761		 * the same lanes mapped twice.
   762		 */
   763		for (; lane < 4; lane++) {
   764			unsigned int idx = find_first_zero_bit(&lanes_used, 4);
   765	
   766			val |= idx << (lane * 2);
   767			lanes_used |= BIT(idx);
   768		}
   769	
   770		return cci_write(priv->regmap, MAX96714_MIPI_LANE_MAP, val, &ret);
   771	}
   772	
   773	static int max96714_rxport_enable_poc(struct max96714_priv *priv)
   774	{
   775		struct max96714_rxport *rxport = &priv->rxport;
   776	
   777		if (!rxport->poc)
   778			return 0;
   779	
   780		return regulator_enable(rxport->poc);
   781	}
   782	
   783	static int max96714_rxport_disable_poc(struct max96714_priv *priv)
   784	{
   785		struct max96714_rxport *rxport = &priv->rxport;
   786	
   787		if (!rxport->poc)
   788			return 0;
   789	
   790		return regulator_disable(rxport->poc);
   791	}
   792	
   793	static int max96714_parse_dt_txport(struct max96714_priv *priv)
   794	{
   795		struct device *dev = &priv->client->dev;
   796		struct fwnode_handle *ep_fwnode;
   797		u32 num_data_lanes;
   798		s64 dpll_freq;
   799		int ret;
   800	
   801		ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
   802							    MAX96714_PAD_SOURCE, 0, 0);
   803		if (!ep_fwnode)
   804			return -EINVAL;
   805	
   806		priv->vep.bus_type = V4L2_MBUS_UNKNOWN;
   807	
   808		ret = v4l2_fwnode_endpoint_alloc_parse(ep_fwnode, &priv->vep);
   809		fwnode_handle_put(ep_fwnode);
   810		if (ret) {
   811			dev_err(dev, "tx: failed to parse endpoint data\n");
   812			return -EINVAL;
   813		}
   814	
   815		if (priv->vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
   816			dev_err(&priv->client->dev, "Unsupported bus-type %u\n",
   817				priv->vep.bus_type);
   818			return -EINVAL;
   819		}
   820	
   821		if (priv->vep.nr_of_link_frequencies != 1) {
   822			ret = -EINVAL;
   823			goto err_free_vep;
   824		}
   825	
   826		/* DPLL freq is twice the link frequency */
 > 827		dpll_freq = priv->vep.link_frequencies[0] * 2;
   828	
   829		/* 100Mbps step, Min 100Mbps, Max 2500Mbps */
   830		if (dpll_freq % MHZ(100) || dpll_freq < MHZ(100) ||
   831		    dpll_freq > MHZ(2500)) {
   832			dev_err(dev, "tx: invalid link frequency\n");
   833			ret = -EINVAL;
   834			goto err_free_vep;
   835		}
   836	
   837		num_data_lanes = priv->vep.bus.mipi_csi2.num_data_lanes;
   838		if (num_data_lanes < 1 || num_data_lanes > 4) {
   839			dev_err(dev,
   840				"tx: invalid number of data lanes should be 1 to 4\n");
   841			ret = -EINVAL;
   842			goto err_free_vep;
   843		}
   844	
   845		return 0;
   846	
   847	err_free_vep:
   848		v4l2_fwnode_endpoint_free(&priv->vep);
   849	
   850		return ret;
   851	};
   852	

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