From: Rob Herring <robh@kernel.org>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>,
linux-renesas-soc@vger.kernel.org, linux-media@vger.kernel.org,
biju.das.jz@bp.renesas.com,
prabhakar.mahadev-lad.rj@bp.renesas.com,
Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/8] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC
Date: Wed, 19 Feb 2025 14:56:20 -0600 [thread overview]
Message-ID: <20250219205620.GA2912221-robh@kernel.org> (raw)
In-Reply-To: <20250219151237.GB31825@pendragon.ideasonboard.com>
On Wed, Feb 19, 2025 at 05:12:37PM +0200, Laurent Pinchart wrote:
> On Wed, Feb 19, 2025 at 08:51:39AM -0600, Rob Herring wrote:
> > On Fri, Feb 14, 2025 at 02:29:51AM +0200, Laurent Pinchart wrote:
> > > Hi Tommaso, Prabhakar,
> > >
> > > Thank you for the patch.
> > >
> > > On Mon, Feb 10, 2025 at 12:45:34PM +0100, Tommaso Merciai wrote:
> > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > >
> > > > The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one
> > > > found on the Renesas RZ/G2L SoC, with the following differences:
> > > > - A different D-PHY
> > > > - Additional registers for the MIPI CSI-2 link
> > > > - Only two clocks
> > > >
> > > > Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P)
> > > > SoC.
> > > >
> > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> > > > ---
> > > > .../bindings/media/renesas,rzg2l-csi2.yaml | 63 ++++++++++++++-----
> > > > 1 file changed, 48 insertions(+), 15 deletions(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> > > > index 7faa12fecd5b..0d07c55a3f35 100644
> > > > --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> > > > +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> > > > @@ -17,12 +17,15 @@ description:
> > > >
> > > > properties:
> > > > compatible:
> > > > - items:
> > > > - - enum:
> > > > - - renesas,r9a07g043-csi2 # RZ/G2UL
> > > > - - renesas,r9a07g044-csi2 # RZ/G2{L,LC}
> > > > - - renesas,r9a07g054-csi2 # RZ/V2L
> > > > - - const: renesas,rzg2l-csi2
> > > > + oneOf:
> > > > + - items:
> > > > + - enum:
> > > > + - renesas,r9a07g043-csi2 # RZ/G2UL
> > > > + - renesas,r9a07g044-csi2 # RZ/G2{L,LC}
> > > > + - renesas,r9a07g054-csi2 # RZ/V2L
> > > > + - const: renesas,rzg2l-csi2
> > > > +
> > >
> > > I'd drop the empty line.
> > >
> > > > + - const: renesas,r9a09g057-csi2 # RZ/V2H(P)
> > > >
> > > > reg:
> > > > maxItems: 1
> > > > @@ -31,16 +34,24 @@ properties:
> > > > maxItems: 1
> > > >
> > > > clocks:
> > > > - items:
> > > > - - description: Internal clock for connecting CRU and MIPI
> > > > - - description: CRU Main clock
> > > > - - description: CRU Register access clock
> > > > + oneOf:
> > > > + - items:
> > > > + - description: Internal clock for connecting CRU and MIPI
> > > > + - description: CRU Main clock
> > > > + - description: CRU Register access clock
> > > > + - items:
> > > > + - description: CRU Main clock
> > > > + - description: CRU Register access clock
> > > >
> > > > clock-names:
> > > > - items:
> > > > - - const: system
> > > > - - const: video
> > > > - - const: apb
> > > > + oneOf:
> > > > + - items:
> > > > + - const: system
> > > > + - const: video
> > > > + - const: apb
> > > > + - items:
> > > > + - const: video
> > > > + - const: apb
> > >
> > > I would move the clocks and clock-names definitions to the conditional
> > > below. Otherwise I think a device tree that has two clocks only but
> > > incorrectly uses "system" and "video" instead of "video" and "apb" will
> > > validate.
> >
> > No, that wouldn't be allowed. The preference is to have it like this
> > because it discourages creating more variations. If the names are all
> > defined in if/then schema, then you can just add a new one with any
> > names you want. Though if the variations become such a mess, then
> > defining them in the if/then schemas would probably be better.
> >
> > It would be better if 'clocks' could be reworked to avoid the 'oneOf'
> > though (oneOf == poor error messages). It just needs a 'minItems: 2'
> > added and the descriptions reworded for both cases.
>
> Don't the items in clocks need to match the items in clock-names ? We
> can't reorder clock-names items as that would be an ABI breakage, so we
> can't reorder clocks items either.
Validation wise, the only thing we check is is it 2 or 3 entries. No way
to enforce it's the right clock. The description is just for humans. So
you could just put "(optional)" on the first entry though there is no
way in json-schema to really do that. If you prefer as-is with the
oneOf, that's fine too.
Rob
next prev parent reply other threads:[~2025-02-19 20:56 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 11:45 [PATCH 0/8] media: rzg2l-cru: Document RZ/G3E (CSI2, CRU) Tommaso Merciai
2025-02-10 11:45 ` [PATCH 1/8] clk: renesas: r9a09g047: Add support for CRU0 clocks, and resets Tommaso Merciai
2025-02-10 11:54 ` Biju Das
2025-02-20 14:39 ` Geert Uytterhoeven
2025-02-20 14:36 ` Geert Uytterhoeven
2025-02-10 11:45 ` [PATCH 2/8] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC Tommaso Merciai
2025-02-14 0:29 ` Laurent Pinchart
2025-02-18 11:55 ` Tommaso Merciai
2025-02-18 12:35 ` Laurent Pinchart
2025-02-18 13:37 ` Tommaso Merciai
2025-02-19 14:51 ` Rob Herring
2025-02-19 15:12 ` Laurent Pinchart
2025-02-19 20:56 ` Rob Herring [this message]
2025-02-19 21:17 ` Laurent Pinchart
2025-02-19 14:52 ` Rob Herring
2025-02-10 11:45 ` [PATCH 3/8] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 block Tommaso Merciai
2025-02-13 8:56 ` Krzysztof Kozlowski
2025-02-13 15:59 ` Tommaso Merciai
2025-02-10 11:45 ` [PATCH 4/8] media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoC Tommaso Merciai
2025-02-10 13:47 ` Rob Herring (Arm)
2025-02-14 0:45 ` Laurent Pinchart
2025-02-18 15:51 ` Tommaso Merciai
2025-02-10 11:45 ` [PATCH 5/8] media: rzg2l-cru: csi2: Use temporary variable for struct device in rzg2l_csi2_probe() Tommaso Merciai
2025-02-10 11:55 ` Biju Das
2025-02-14 0:47 ` Laurent Pinchart
2025-02-18 12:12 ` Tommaso Merciai
2025-02-10 11:45 ` [PATCH 6/8] media: rzg2l-cru: csi2: Use devm_pm_runtime_enable() Tommaso Merciai
2025-02-10 11:56 ` Biju Das
2025-02-14 0:48 ` Laurent Pinchart
2025-02-10 11:45 ` [PATCH 7/8] media: rzg2l-cru: rzg2l-core: Use temporary variable for struct device in rzg2l_cru_probe() Tommaso Merciai
2025-02-10 11:56 ` Biju Das
2025-02-14 0:49 ` Laurent Pinchart
2025-02-10 11:45 ` [PATCH 8/8] media: rzg2l-cru: rzg2l-core: Use devm_pm_runtime_enable() Tommaso Merciai
2025-02-10 11:57 ` Biju Das
2025-02-14 0:50 ` Laurent Pinchart
2025-02-18 12:21 ` Tommaso Merciai
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