[PATCH v2 0/2] media: rkisp1: Add YUV bypass support for rkisp1

[PATCH v2 0/2] media: rkisp1: Add YUV bypass support for rkisp1

[Isaac Scott]

Hi all,

"Smart" cameras that do all image processing on the camera module itself
may not have the ability to output image data in RAW formats. These
cameras would require the use of the ISI, which is sometimes not
included in the hardware.

In hotplug systems, it is also impossible to switch between the ISP and
ISI at runtime, meaning if a media pipeline was set up between the
sensor and the rkisp1 ISP capture device, it would not be possible to
switch from a sensor supporting RAW formats to one outputting only YUV.

Thankfully, the ISP can be configured to allow the incoming YUV stream
to "bypass" the ISP blocks, allowing these sensors to be used. It
bypasses all ISP blocks and passes through the resizer, with the input
image data being presented at the output of the ISP to be captured.

In bypass mode, stats buffers are not provided by the ISP.

This series adds support for "YUV bypass", allowing sensors which only
output YUV streams to be used through the rkisp1.

Tested on: v6.18
Compile-tested on: media/next

---

Changelog since v1:
- Dropped patches 1, 3, 4 and 5.
- Removed the in_bypass flag from patch 2, as it is not needed due to
  the removal of the other patches.

Isaac Scott (2):
  media: rkisp1-isp: Set correct data mode for YUV bypass
  media: rkisp1: Treat 8 bus width and 16 bus width formats the same

 drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

-- 
2.43.0

[PATCH v2 1/2] media: rkisp1-isp: Set correct data mode for YUV bypass

[Isaac Scott]

The rkisp1 features a 'bypass' mode for RAW and YUV formats. This
disables all ISP blocks, and makes the rkisp1 display input data from
the MIPI CSI receiver at the output, unmodified.

To determine whether we can activate bypass, we can detect whether both
the source and sink formats are YUV. If they are, we must configure the
ISP to expect a YUV input, interpreting H/VSYNC signals as data
enable / disable.

Signed-off-by: Isaac Scott <isaac.scott@ideasonboard.com>

---

Changelog since v1:
- Removed in_bypass flag
- Renamed the patch to better represent the functionality of the patch

---
 drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
index 2311672cedb1..21bfa0edbaf1 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
@@ -240,7 +240,9 @@ static int rkisp1_config_isp(struct rkisp1_isp *isp,
 		}
 	} else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) {
 		acq_mult = 2;
-		if (mbus_type == V4L2_MBUS_CSI2_DPHY) {
+		if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) {
+			isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_DATA_MODE;
+		} else if (mbus_type == V4L2_MBUS_CSI2_DPHY) {
 			isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601;
 		} else {
 			if (mbus_type == V4L2_MBUS_BT656)
-- 
2.43.0

[PATCH v2 2/2] media: rkisp1: Treat 8 bus width and 16 bus width formats the same

[Isaac Scott]

As MIPI CSI is a serial interface, we should be able to use a bit depth
of 16 in the same way as 8 bit depth. Add a fallthrough case to ensure
we don't reject 16 bit depth formats.

Signed-off-by: Isaac Scott <isaac.scott@ideasonboard.com>
---
 drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
index 21bfa0edbaf1..0fc1ca7f97a0 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
@@ -261,6 +261,7 @@ static int rkisp1_config_isp(struct rkisp1_isp *isp,
 
 		switch (sink_fmt->bus_width) {
 		case 8:
+		case 16:
 			acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO;
 			break;
 		case 10:
-- 
2.43.0

Re: [PATCH v2 1/2] media: rkisp1-isp: Set correct data mode for YUV bypass

[Laurent Pinchart]

Hi Isaac,

Thank you for the patch.

On Thu, Feb 05, 2026 at 10:32:06AM +0000, Isaac Scott wrote:
> The rkisp1 features a 'bypass' mode for RAW and YUV formats. This
> disables all ISP blocks, and makes the rkisp1 display input data from
> the MIPI CSI receiver at the output, unmodified.
> 
> To determine whether we can activate bypass, we can detect whether both
> the source and sink formats are YUV. If they are, we must configure the
> ISP to expect a YUV input, interpreting H/VSYNC signals as data
> enable / disable.
> 
> Signed-off-by: Isaac Scott <isaac.scott@ideasonboard.com>
> 
> ---
> 
> Changelog since v1:
> - Removed in_bypass flag
> - Renamed the patch to better represent the functionality of the patch
> 
> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> index 2311672cedb1..21bfa0edbaf1 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> @@ -240,7 +240,9 @@ static int rkisp1_config_isp(struct rkisp1_isp *isp,
>  		}
>  	} else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) {
>  		acq_mult = 2;
> -		if (mbus_type == V4L2_MBUS_CSI2_DPHY) {
> +		if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) {
> +			isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_DATA_MODE;
> +		} else if (mbus_type == V4L2_MBUS_CSI2_DPHY) {
>  			isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601;
>  		} else {
>  			if (mbus_type == V4L2_MBUS_BT656)

This doesn't seem right. If the sink format is YUV, then the source
format has to be YUV too (the ISP can't produce Bayer from YUV). The
source pixel encoding condition will always be true, the other branches
will never be taken, most likely breaking parallel inputs.

Also, the documentation states that in YCbCr bypass mode, ISP_MODE
should be set to 2 (ITU-R BT.601), not 4 (data mode).

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 2/2] media: rkisp1: Treat 8 bus width and 16 bus width formats the same

[Laurent Pinchart]

On Thu, Feb 05, 2026 at 10:32:07AM +0000, Isaac Scott wrote:
> As MIPI CSI is a serial interface, we should be able to use a bit depth
> of 16 in the same way as 8 bit depth. Add a fallthrough case to ensure
> we don't reject 16 bit depth formats.

I think the change is right, but the commit message isn't.

The driver already lists YUV 1X16 formats as supported on the ISP sink
pad in the rkisp1_formats array. Those formats report a bus width of 16,
and they are used by the CSI-2 receivers for YUV formats. However, the
rkisp1_config_isp() function doesn't support the 16-bit bus width, and
returns an error. It needs to be fixed to enable YUV capture. You could
check the git history to see if this got broken at some point (in which
case a Fixes: tag would be nice), or if it has never worked.

The 16 bits per pixel YUV formats use 8 bits per component, so they are
handled by the ISP input as 8-bit format. That's why you can use
RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO, as for the 8-bit bus width.

With an updated commit message this patch should be good.

> Signed-off-by: Isaac Scott <isaac.scott@ideasonboard.com>
> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> index 21bfa0edbaf1..0fc1ca7f97a0 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> @@ -261,6 +261,7 @@ static int rkisp1_config_isp(struct rkisp1_isp *isp,
>  
>  		switch (sink_fmt->bus_width) {
>  		case 8:
> +		case 16:
>  			acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO;
>  			break;
>  		case 10:

-- 
Regards,

Laurent Pinchart