From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Isaac Scott <isaac.scott@ideasonboard.com>
Cc: linux-media@vger.kernel.org, dafna@fastmail.com,
mchehab@kernel.org, heiko@sntech.de,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] media: rkisp1: Treat 8 bus width and 16 bus width formats the same
Date: Fri, 6 Feb 2026 02:29:10 +0200 [thread overview]
Message-ID: <20260206002910.GE1376807@killaraus.ideasonboard.com> (raw)
In-Reply-To: <20260205103207.4020959-3-isaac.scott@ideasonboard.com>
On Thu, Feb 05, 2026 at 10:32:07AM +0000, Isaac Scott wrote:
> As MIPI CSI is a serial interface, we should be able to use a bit depth
> of 16 in the same way as 8 bit depth. Add a fallthrough case to ensure
> we don't reject 16 bit depth formats.
I think the change is right, but the commit message isn't.
The driver already lists YUV 1X16 formats as supported on the ISP sink
pad in the rkisp1_formats array. Those formats report a bus width of 16,
and they are used by the CSI-2 receivers for YUV formats. However, the
rkisp1_config_isp() function doesn't support the 16-bit bus width, and
returns an error. It needs to be fixed to enable YUV capture. You could
check the git history to see if this got broken at some point (in which
case a Fixes: tag would be nice), or if it has never worked.
The 16 bits per pixel YUV formats use 8 bits per component, so they are
handled by the ISP input as 8-bit format. That's why you can use
RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO, as for the 8-bit bus width.
With an updated commit message this patch should be good.
> Signed-off-by: Isaac Scott <isaac.scott@ideasonboard.com>
> ---
> drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> index 21bfa0edbaf1..0fc1ca7f97a0 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
> @@ -261,6 +261,7 @@ static int rkisp1_config_isp(struct rkisp1_isp *isp,
>
> switch (sink_fmt->bus_width) {
> case 8:
> + case 16:
> acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO;
> break;
> case 10:
--
Regards,
Laurent Pinchart
prev parent reply other threads:[~2026-02-06 0:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 10:32 [PATCH v2 0/2] media: rkisp1: Add YUV bypass support for rkisp1 Isaac Scott
2026-02-05 10:32 ` [PATCH v2 1/2] media: rkisp1-isp: Set correct data mode for YUV bypass Isaac Scott
2026-02-06 0:17 ` Laurent Pinchart
2026-02-05 10:32 ` [PATCH v2 2/2] media: rkisp1: Treat 8 bus width and 16 bus width formats the same Isaac Scott
2026-02-06 0:29 ` Laurent Pinchart [this message]
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