[RFC PATCH v5 9/9] arm64: dts: freescale: imx95: Add video codec node

Nas Chung
2026-04-15T09:25:52Z

Add the Chips and Media wave633 video codec node on IMX95 SoCs.

Signed-off-by: Nas Chung <nas.chung@chipsnmedia.com>
---
.../boot/dts/freescale/imx95-15x15-evk.dts | 7 +++-
.../boot/dts/freescale/imx95-15x15-frdm.dts | 5 +++
.../boot/dts/freescale/imx95-19x19-evk.dts | 10 ++++++
.../dts/freescale/imx95-19x19-verdin-evk.dts | 10 ++++++
.../dts/freescale/imx95-phycore-fpsc.dtsi | 10 ++++++
.../dts/freescale/imx95-toradex-smarc-dev.dts | 5 +++
.../dts/freescale/imx95-toradex-smarc.dtsi | 5 +++
.../boot/dts/freescale/imx95-tqma9596sa.dtsi | 7 +++-
arch/arm64/boot/dts/freescale/imx95.dtsi | 35 +++++++++++++++++++
9 files changed, 92 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index d4184fb8b28c..2c841e476d17 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -215,7 +215,7 @@ rsc_table: rsc-table@88220000 {
no-map;
};

- vpu_boot: vpu-boot@a0000000 {
+ vpu_boot: memory@a0000000 {
reg = <0 0xa0000000 0 0x100000>;
no-map;
};
@@ -1157,6 +1157,11 @@ &wdog3 {
status = "okay";
};

+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
+
&xcvr {
clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
<&scmi_clk IMX95_CLK_SPDIF>,
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
index ca1c4966c867..106186c75f9c 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
@@ -962,3 +962,8 @@ &usdhc3 {
&wdog3 {
status = "okay";
};
+
+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index aaa0da55a22b..0ee5f9700fd3 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -76,6 +76,11 @@ linux_cma: linux,cma {
linux,cma-default;
reusable;
};
+
+ vpu_boot: memory@a0000000 {
+ reg = <0 0xa0000000 0 0x100000>;
+ no-map;
+ };
};

flexcan1_phy: can-phy0 {
@@ -1142,3 +1147,8 @@ &tpm6 {
pinctrl-0 = <&pinctrl_tpm6>;
status = "okay";
};
+
+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts
index 2b0ff232f680..c35ad2466b19 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts
@@ -65,6 +65,11 @@ linux_cma: linux,cma {
linux,cma-default;
reusable;
};
+
+ vpu_boot: memory@a0000000 {
+ reg = <0 0xa0000000 0 0x100000>;
+ no-map;
+ };
};

reg_1p8v: regulator-1p8v {
@@ -693,3 +698,8 @@ pinctrl_usdhc3: usdhc3grp {
<IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x138e>;
};
};
+
+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi b/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi
index 7519d5bd06ba..b713d4159e35 100644
--- a/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi
@@ -59,6 +59,11 @@ linux,cma {
size = <0 0x3c000000>;
linux,cma-default;
};
+
+ vpu_boot: memory@a0000000 {
+ reg = <0 0xa0000000 0 0x100000>;
+ no-map;
+ };
};
};

@@ -654,3 +659,8 @@ &usdhc3 { /* FPSC SDIO */
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-names = "default";
};
+
+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts
index 5b05f256fd52..5bdfdab8647e 100644
--- a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts
@@ -275,3 +275,8 @@ &usb3_phy {
&usdhc2 {
status = "okay";
};
+
+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi
index 5932ba238a8a..10e6d1fbb8e2 100644
--- a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi
@@ -156,6 +156,11 @@ linux_cma: linux,cma {
alloc-ranges = <0 0x80000000 0 0x7f000000>;
linux,cma-default;
};
+
+ vpu_boot: memory@a0000000 {
+ reg = <0 0xa0000000 0 0x100000>;
+ no-map;
+ };
};
};

diff --git a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi
index 456129f4a682..a7b5b517e021 100644
--- a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi
@@ -40,7 +40,7 @@ linux_cma: linux,cma {
linux,cma-default;
};

- vpu_boot: vpu-boot@a0000000 {
+ vpu_boot: memory@a0000000 {
reg = <0 0xa0000000 0 0x100000>;
no-map;
};
@@ -801,3 +801,8 @@ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
<IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e>;
};
};
+
+&vpu {
+ memory-region = <&vpu_boot>;
+ sram = <&sram1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 55e2da094c88..de8fb19c7e3b 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -2005,6 +2005,41 @@ vpu_blk_ctrl: clock-controller@4c410000 {
assigned-clock-rates = <133333333>, <667000000>, <500000000>;
};

+ vpu: video-codec@4c4c0000 {
+ compatible = "nxp,imx95-vpu";
+ reg = <0x0 0x4c4c0000 0x0 0x10000>;
+ clocks = <&scmi_clk IMX95_CLK_VPU>,
+ <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>;
+ clock-names = "core", "vpublk";
+ power-domains = <&scmi_devpd IMX95_PD_VPU>,
+ <&scmi_perf IMX95_PERF_VPU>;
+ power-domain-names = "vpu", "perf";
+ #cooling-cells = <2>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ interface@4c480000 {
+ reg = <0x0 0x4c480000 0x0 0x10000>;
+ interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ interface@4c490000 {
+ reg = <0x0 0x4c490000 0x0 0x10000>;
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ interface@4c4a0000 {
+ reg = <0x0 0x4c4a0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ interface@4c4b0000 {
+ reg = <0x0 0x4c4b0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
jpegdec: jpegdec@4c500000 {
compatible = "nxp,imx95-jpgdec", "nxp,imx8qxp-jpgdec";
reg = <0x0 0x4C500000 0x0 0x00050000>;
--
2.31.1