From: sashiko-bot@kernel.org
To: "David Heidelberg via B4 Relay" <devnull+david.ixit.cz@kernel.org>
Cc: linux-media@vger.kernel.org
Subject: Re: [PATCH v7 3/8] media: qcom: camss: Prepare CSID for C-PHY support
Date: Fri, 05 Jun 2026 13:35:45 +0000 [thread overview]
Message-ID: <20260605133545.D70B11F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260605-qcom-cphy-v7-3-426c37e9008f@ixit.cz>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] CSID PHY selection state (`phy_sel`) is not reset when switching the link to the Test Pattern Generator (TPG), potentially leaving the hardware in C-PHY mode for TPG data.
--
commit 79ab3be6b44125cac8b0fb89e7dbad51a804a8bf
Author: David Heidelberg <david@ixit.cz>
media: qcom: camss: Prepare CSID for C-PHY support
This commit updates the CSID configuration to inherit C-PHY information
from CSIPHY, ensuring the CSI2_RX_CFG0_PHY_TYPE_SEL register is properly
set when C-PHY mode is used.
> diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c
> index 48459b46a981b..bcc34ac9dd212 100644
> --- a/drivers/media/platform/qcom/camss/camss-csid.c
> +++ b/drivers/media/platform/qcom/camss/camss-csid.c
[ ... ]
> @@ -1291,6 +1291,11 @@ static int csid_link_setup(struct media_entity *entity,
>
> lane_cfg = &csiphy->cfg.csi2->lane_cfg;
> csid->phy.lane_cnt = lane_cfg->num_data;
> + if (lane_cfg->phy_cfg == V4L2_MBUS_CSI2_CPHY)
> + csid->phy.phy_sel = CSID_PHY_SEL_CPHY;
> + else
> + csid->phy.phy_sel = CSID_PHY_SEL_DPHY;
> +
[Severity: Medium]
Does this leave the phy_sel state uninitialized when the link is switched
to the Test Pattern Generator (TPG)?
In csid_link_setup(), when switching the link to the internal TPG, the newly
added phy_sel field is not updated:
csid_link_setup() {
...
if (sd->grp_id == TPG_GRP_ID) {
tpg = v4l2_get_subdevdata(sd);
csid->phy.lane_cnt = tpg->res->lane_cnt;
csid->phy.csiphy_id = tpg->id;
csid->phy.lane_assign = csid_get_lane_assign(NULL, csid->phy.lane_cnt);
csid->tpg_linked = true;
/* csid->phy.phy_sel is not reset here */
} else {
...
If a C-PHY sensor was previously linked, phy_sel will retain the stale value
CSID_PHY_SEL_CPHY.
When streaming starts, __csid_configure_rx() writes this stale phy_sel value
into the CSI2_RX_CFG0_PHY_TYPE_SEL register, even for TPG streams.
Because the TPG bypasses the C-PHY 3-phase encoding, applying C-PHY decoding
rules to TPG data might cause the hardware to misinterpret the stream and
break the test pattern generator.
> csid->phy.lane_assign = csid_get_lane_assign(lane_cfg, lane_cfg->num_data);
> csid->tpg_linked = false;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260605-qcom-cphy-v7-0-426c37e9008f@ixit.cz?part=3
next prev parent reply other threads:[~2026-06-05 13:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-05 13:14 [PATCH v7 0/8] media: camss: Add support for C-PHY configuration on Qualcomm platforms David Heidelberg via B4 Relay
2026-06-05 13:14 ` [PATCH v7 1/8] media: qcom: camss: csiphy: Introduce PHY configuration David Heidelberg via B4 Relay
2026-06-05 13:14 ` [PATCH v7 2/8] media: qcom: camss: csiphy-3ph: Use odd bits for configuring C-PHY lanes David Heidelberg via B4 Relay
2026-06-05 13:30 ` sashiko-bot
2026-06-08 18:16 ` Frank Li
2026-06-05 13:14 ` [PATCH v7 3/8] media: qcom: camss: Prepare CSID for C-PHY support David Heidelberg via B4 Relay
2026-06-05 13:35 ` sashiko-bot [this message]
2026-06-08 18:18 ` Frank Li
2026-06-05 13:14 ` [PATCH v7 4/8] media: qcom: camss: Initialize lanes after lane configuration is available David Heidelberg via B4 Relay
2026-06-05 13:40 ` sashiko-bot
2026-06-05 13:14 ` [PATCH v7 5/8] media: qcom: camss: csiphy-3ph: Add Gen2 v1.1 MIPI CSI-2 C-PHY init David Heidelberg via B4 Relay
2026-06-08 9:00 ` Bryan O'Donoghue
2026-06-08 10:37 ` David Heidelberg
2026-06-05 13:14 ` [PATCH v7 6/8] media: qcom: camss: csiphy-3ph: Update " David Heidelberg via B4 Relay
2026-06-05 13:14 ` [PATCH v7 7/8] media: qcom: camss: Account for C-PHY when calculating link frequency David Heidelberg via B4 Relay
2026-06-05 14:00 ` sashiko-bot
2026-06-05 13:14 ` [PATCH v7 8/8] media: qcom: camss: Enable C-PHY where available David Heidelberg via B4 Relay
2026-06-08 8:56 ` [PATCH v7 0/8] media: camss: Add support for C-PHY configuration on Qualcomm platforms Bryan O'Donoghue
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260605133545.D70B11F00893@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=devnull+david.ixit.cz@kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox