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Mon, 20 Jul 2026 09:38:31 -0700 (PDT) From: Fernando Rimoli To: Sakari Ailus , Daniel Scally , linux-media@vger.kernel.org Cc: Mauro Carvalho Chehab , Arsalan Naeem , Jakob Berg Jespersen , linux-kernel@vger.kernel.org, Fernando Rimoli Subject: [PATCH v3 0/4] media: Enable the OV5693 front camera on IPU6 Surface devices Date: Mon, 20 Jul 2026 18:38:15 +0200 Message-ID: <20260720163819.104130-1-fernandorimoli11@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260717132021.18034-1-fernandorimoli11@gmail.com> References: <20260717132021.18034-1-fernandorimoli11@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This enables the OV5693 front camera on Intel IPU6 Surface devices such as the Microsoft Surface Pro 9. Four pieces are needed on a stock kernel: 1/4 ov5693: add the "OVTI5693" ACPI HID so the i2c core binds the driver (these devices enumerate the sensor as OVTI5693, not INT33BE). 2/4 ipu-bridge: add the same HID so the bridge builds the sensor's fwnode graph. 3/4 ov5693: gate the MIPI clock lane when the endpoint requests a non-continuous clock, which the IPU6 CSI-2 receiver needs to lock. 4/4 ipu-bridge: request the non-continuous clock for the ov5693, but only on IPU6 (matched against ipu6_pci_tbl). v3 reworks the clock-lane gate per Sakari's review of v2: instead of writing MIPI_CTRL00 unconditionally, the sensor now gates the clock lane only when the "clock-noncontinuous" endpoint property is present (the V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK flag), the same way ov5647 does, and the ipu-bridge supplies that property, gated on the IPU6 PCI IDs. The property is set only for the ov5693 HIDs and only when the bridge sits on a PCI device matching ipu6_pci_tbl, so IPU3 users of the same sensor and the non-PCI IVSC bridge path are left untouched. I scoped it to all ipu6_pci_tbl IDs since the gate is confirmed needed across two IPU6 generations (see below), happy to narrow it to specific IDs if you would prefer. On the register value: unlike ov5647, patch 3 sets bit 5 (clock-lane gate) and bit 2 (LP11 idle) but not bit 4 (line sync). I re-swept the register at runtime on my Surface Pro 9 (IPU6) to check bit 4 specifically: 0x24 (bit5+bit2) streams 300/300 frames at ~28 fps, but adding bit 4 (i.e. ov5647's 0x34) collapses the stream to a couple of frames, and bit 4 alone fails outright. A bit5-only value recovered to 300/300 in the same run, so this is a value effect. This matches your point that the IPU6 PHYs differ (ov2740 writes this register to 0 on Thinkpad IPU6), the ov5693 on IPU6 wants exactly bit5+bit2. Register read-back confirmed the power-on default is 0x00. Patches 1-2 are independent and useful on their own for enumeration; patch 1 carries Dan Scally's Reviewed-by from v1. Changes since v2 [1]: - Reworked patch 3: gate the MIPI clock lane on the "clock-noncontinuous" endpoint property (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK) rather than writing MIPI_CTRL00 unconditionally, following ov5647. When the flag is absent the register is left at its reset default (IPU3 and others unaffected). - New patch 4: ipu-bridge sets "clock-noncontinuous" for the ov5693, gated on the IPU6 PCI IDs (ipu6_pci_tbl), skipping non-PCI bridge instances. - Characterised bit 4 (line sync) on IPU6 and documented why the value stays bit5+bit2, differing from ov5647. - Patch 3 was reworked but is functionally identical on tested hardware (the same register value is written whenever the bridge sets the property), so I kept Jakob Berg Jespersen's Tested-by; Jakob, please shout if you would rather re-test v3. The two IPU6 units the gate has been tested on: Surface Pro 9 (IPU6EP_ADLP, 0x465d) and, via Jakob, Surface Pro 7+ (IPU6, Tiger Lake, 0x9a19). [1] https://lore.kernel.org/linux-media/20260717132021.18034-1-fernandorimoli11@gmail.com/ Fernando Rimoli (4): media: i2c: ov5693: Add OVTI5693 ACPI HID media: ipu-bridge: Add OVTI5693 to the list of supported sensors media: i2c: ov5693: Gate the MIPI clock lane for non-continuous clock media: ipu-bridge: Request non-continuous clock for ov5693 on IPU6 drivers/media/i2c/ov5693.c | 28 ++++++++++++++++++++++++ drivers/media/pci/intel/ipu-bridge.c | 32 ++++++++++++++++++++++++++++ include/media/ipu-bridge.h | 2 +- 3 files changed, 61 insertions(+), 1 deletion(-) -- 2.43.0