From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CABED4921B7 for ; Mon, 7 Sep 2026 11:30:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788780626; cv=none; b=RqZ0B39E5LyMmpGPdMAsbTdFa4zJHUhLSVn4U+sHenVja+nDKPmppXZZD9HS5TjF4rMLLWL2lIbcPb9ldL9R6EaoiT2FBemBeaMaIwWDbyZLsIEICKVQMUpot5EJcuh69kN05EX1KFiyWHKPUnxSjqKCki9KcRkA9k5Nlq1y2SQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788780626; c=relaxed/simple; bh=sbjSNdg4vqSlq5NKuG96Rsux3Y53YyVktcWEc+ke0dk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IekMyntwlwG09YQAEU0TjOYh5vUa9Ew2zCi7ka0zwiYy9eRxdXCmS7JUyHIKZZSV2yJSuU4iKOsJ/TqB3UhGy4fvZ/tb3S6+t10r7koJyZtms0pd3MxbMDFKGIWAAslA/c5AJyI504kGGcEkoGt7+E3IvjCtk5Jc+fGbggt5sKU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Qaw9A4u4; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Qaw9A4u4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1788780624; x=1820316624; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sbjSNdg4vqSlq5NKuG96Rsux3Y53YyVktcWEc+ke0dk=; b=Qaw9A4u4j6VCgap1Wl+CBB4sTuKc4QcsU/Y5kiiPFatw0ENebIXgxdFH PqMaJdcXsUk00nk48xE6XDL/UjUICeNixFMBAXS4Z8D/fj/x7X54qZI/l XRQAc1VmVvpl/sNx2+/iCncR2h4Kf1sbhOW82rQY2wwPKJN6zOiRZ2+ez szojbu2t+mmzX07gXogX5szsbyYn1ceR+dCBjkofNKzlW3txyUMEglJv0 nMszit7R3HtnAExREa7Cz23ITQ15/+/wQh/zR7nLYYXFdBEVh5upiOyF+ pPJ9DRHq5jH7P6OoCdUGsV48UN01tGjaW3jPBVNWSSVv6SW01OUsmDxSs w==; X-CSE-ConnectionGUID: SvFACnzZRPulaah5ySjdNA== X-CSE-MsgGUID: FFljXdu+Sr+2tyI9nA3Jvw== X-IronPort-AV: E=McAfee;i="6800,10657,11898"; a="100538622" X-IronPort-AV: E=Sophos;i="6.25,267,1779174000"; d="scan'208";a="100538622" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2026 04:30:13 -0700 X-CSE-ConnectionGUID: dcWg1HpHT4iB0ZMS7L6deQ== X-CSE-MsgGUID: qrIqdMXOTNG1jUQGPlCy+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,267,1779174000"; d="scan'208";a="300569223" Received: from abityuts-desk1.ger.corp.intel.com (HELO kekkonen.fi.intel.com) ([10.245.245.230]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2026 04:30:12 -0700 Received: from punajuuri.localdomain (unknown [192.168.240.130]) by kekkonen.fi.intel.com (Postfix) with ESMTP id D795C121F93; Mon, 07 Sep 2026 14:30:05 +0300 (EEST) Received: from sailus by punajuuri.localdomain with local (Exim 4.98.2) (envelope-from ) id 1x3XY5-0000000ARob-1Wwk; Mon, 07 Sep 2026 14:30:05 +0300 Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo From: Sakari Ailus To: linux-media@vger.kernel.org Cc: Antti Laakso , sarang.sapre@intel.com, daxing.li@intel.com, ong.hock.yu@intel.com Subject: [PATCH v4 23/45] media: ipu6: Add ipu7 fw com methods Date: Mon, 7 Sep 2026 14:29:42 +0300 Message-ID: <20260907113004.2489993-24-sakari.ailus@linux.intel.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260907113004.2489993-1-sakari.ailus@linux.intel.com> References: <20260907113004.2489993-1-sakari.ailus@linux.intel.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Antti Laakso The get/put token methods read/write to ipu7 firmware message queues. Signed-off-by: Antti Laakso Signed-off-by: Sakari Ailus --- drivers/media/pci/intel/ipu6/Makefile | 4 +- drivers/media/pci/intel/ipu6/ipu7-fw-com.c | 74 ++++++++++++++++++++++ drivers/media/pci/intel/ipu6/ipu7-fw-com.h | 51 +++++++++++++++ 3 files changed, 128 insertions(+), 1 deletion(-) create mode 100644 drivers/media/pci/intel/ipu6/ipu7-fw-com.c create mode 100644 drivers/media/pci/intel/ipu6/ipu7-fw-com.h diff --git a/drivers/media/pci/intel/ipu6/Makefile b/drivers/media/pci/intel/ipu6/Makefile index c0daf0995b22..406e2e19df17 100644 --- a/drivers/media/pci/intel/ipu6/Makefile +++ b/drivers/media/pci/intel/ipu6/Makefile @@ -8,7 +8,9 @@ intel-ipu6-y := ipu6.o \ ipu7-mmu-hw.o \ ipu6-buttress.o \ ipu6-cpd.o \ - ipu6-fw-com.o + ipu6-fw-com.o \ + ipu7-fw-com.o \ + ipu7-boot.o obj-$(CONFIG_VIDEO_INTEL_IPU6) += intel-ipu6.o diff --git a/drivers/media/pci/intel/ipu6/ipu7-fw-com.c b/drivers/media/pci/intel/ipu6/ipu7-fw-com.c new file mode 100644 index 000000000000..7dd1e683aa92 --- /dev/null +++ b/drivers/media/pci/intel/ipu6/ipu7-fw-com.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2026 Intel Corporation + */ + +#include + +#include "ipu7-fw-com.h" + +static void __iomem *ipu7_fw_com_get_indices(struct ipu7_fw_com_context *ctx, + u32 q) +{ + return ctx->queue_indices + (q * sizeof(struct ipu7_fw_com_queue_indices)); +} + +void *ipu7_fw_com_get_token(struct ipu7_fw_com_context *ctx, int q) +{ + struct ipu7_fw_com_queue_config *queue_params = &ctx->queue_configs[q]; + void __iomem *queue_indices = ipu7_fw_com_get_indices(ctx, q); + u32 write_index = readl(queue_indices + + offsetof(struct ipu7_fw_com_queue_indices, + write_index)); + u32 read_index = readl(queue_indices + + offsetof(struct ipu7_fw_com_queue_indices, + read_index)); + void *token = NULL; + + if (q < ctx->num_output_queues) { + /* Output queue */ + bool empty = (write_index == read_index); + + if (!empty) + token = queue_params->token_array_mem + + read_index * + queue_params->token_size_in_bytes; + } else { + /* Input queue */ + bool full = (read_index == ((write_index + 1U) % + (u32)queue_params->max_capacity)); + + if (!full) + token = queue_params->token_array_mem + + write_index * queue_params->token_size_in_bytes; + } + return token; +} +EXPORT_SYMBOL_NS_GPL(ipu7_fw_com_get_token, "INTEL_IPU6"); + +void ipu7_fw_com_put_token(struct ipu7_fw_com_context *ctx, int q) +{ + struct ipu7_fw_com_queue_config *queue_params = &ctx->queue_configs[q]; + void __iomem *queue_indices = ipu7_fw_com_get_indices(ctx, q); + u32 offset, index; + + if (q < ctx->num_output_queues) + /* Output queue */ + offset = offsetof(struct ipu7_fw_com_queue_indices, read_index); + + else + /* Input queue */ + offset = offsetof(struct ipu7_fw_com_queue_indices, write_index); + + index = readl(queue_indices + offset); + writel((index + 1U) % queue_params->max_capacity, + queue_indices + offset); +} +EXPORT_SYMBOL_NS_GPL(ipu7_fw_com_put_token, "INTEL_IPU6"); + +struct ipu7_fw_com_queue_params_config * +ipu7_fw_com_get_queue_config(struct ipu7_fw_com_config *config) +{ + return (struct ipu7_fw_com_queue_params_config *)(&config[1]); +} +EXPORT_SYMBOL_NS_GPL(ipu7_fw_com_get_queue_config, "INTEL_IPU6"); diff --git a/drivers/media/pci/intel/ipu6/ipu7-fw-com.h b/drivers/media/pci/intel/ipu6/ipu7-fw-com.h new file mode 100644 index 000000000000..10c09e759bed --- /dev/null +++ b/drivers/media/pci/intel/ipu6/ipu7-fw-com.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2026 Intel Corporation */ + +#ifndef IPU7_FW_COM_H +#define IPU7_FW_COM_H + +#include + +struct ipu7_fw_com_queue_config { + void *token_array_mem; + u32 queue_size; + u16 token_size_in_bytes; + u16 max_capacity; +}; + +struct ipu7_fw_com_context { + u16 num_input_queues; + u16 num_output_queues; + struct ipu7_fw_com_queue_config *queue_configs; + void __iomem *queue_indices; + dma_addr_t queue_mem_dma_addr; + void *queue_mem; + u32 queue_mem_size; + struct ipu7_boot_abi_cfg *boot_config; + dma_addr_t boot_config_dma_addr; + u32 boot_config_size; + u32 fw_entry; +}; + +struct ipu7_fw_com_queue_params_config { + u32 token_array_mem; + u16 token_size_in_bytes; + u16 max_capacity; +}; + +struct ipu7_fw_com_config { + u16 max_output_queues; + u16 max_input_queues; +}; + +struct ipu7_fw_com_queue_indices { + u32 read_index; + u32 write_index; +}; + +void ipu7_fw_com_put_token(struct ipu7_fw_com_context *ctx, int q); +void *ipu7_fw_com_get_token(struct ipu7_fw_com_context *ctx, int q); +struct ipu7_fw_com_queue_params_config * +ipu7_fw_com_get_queue_config(struct ipu7_fw_com_config *config); + +#endif /* IPU7_FW_COM_H */ -- 2.47.3