From: Mikko Perttunen <mperttunen@nvidia.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Thierry Reding" <treding@nvidia.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Sowjanya Komatineni" <skomatineni@nvidia.com>,
"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Prashant Gaikwad" <pgaikwad@nvidia.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Svyatoslav Ryhel" <clamor95@gmail.com>,
"Dmitry Osipenko" <digetx@gmail.com>,
"Jonas Schwöbel" <jonasschwoebel@yahoo.de>,
"Charan Pedumuru" <charan.pedumuru@gmail.com>,
"Svyatoslav Ryhel" <clamor95@gmail.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org, linux-clk@vger.kernel.org,
linux-staging@lists.linux.dev
Subject: Re: [PATCH v2 13/23] staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to CSI
Date: Mon, 22 Sep 2025 13:11:05 +0900 [thread overview]
Message-ID: <2325951.TLkxdtWsSY@senjougahara> (raw)
In-Reply-To: <20250906135345.241229-14-clamor95@gmail.com>
On Saturday, September 6, 2025 10:53 PM Svyatoslav Ryhel wrote:
> The avdd-dsi-csi-supply is CSI power supply not VI, hence move it to
> proper place.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> drivers/staging/media/tegra-video/csi.c | 19 ++++++++++++++++++-
> drivers/staging/media/tegra-video/vi.c | 23 ++---------------------
> drivers/staging/media/tegra-video/vi.h | 2 --
> include/linux/tegra-csi.h | 2 ++
> 4 files changed, 22 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/staging/media/tegra-video/csi.c b/drivers/staging/media/tegra-video/csi.c
> index c848e4ab51ac..1677eb51ec21 100644
> --- a/drivers/staging/media/tegra-video/csi.c
> +++ b/drivers/staging/media/tegra-video/csi.c
> @@ -710,6 +710,8 @@ static int __maybe_unused csi_runtime_suspend(struct device *dev)
>
> clk_bulk_disable_unprepare(csi->soc->num_clks, csi->clks);
>
> + regulator_disable(csi->vdd);
> +
> return 0;
> }
>
> @@ -718,13 +720,23 @@ static int __maybe_unused csi_runtime_resume(struct device *dev)
> struct tegra_csi *csi = dev_get_drvdata(dev);
> int ret;
>
> + ret = regulator_enable(csi->vdd);
> + if (ret) {
> + dev_err(dev, "failed to enable VDD supply: %d\n", ret);
> + return ret;
> + }
> +
> ret = clk_bulk_prepare_enable(csi->soc->num_clks, csi->clks);
> if (ret < 0) {
> dev_err(csi->dev, "failed to enable clocks: %d\n", ret);
> - return ret;
> + goto disable_vdd;
> }
>
> return 0;
> +
> +disable_vdd:
> + regulator_disable(csi->vdd);
> + return ret;
> }
>
> static int tegra_csi_init(struct host1x_client *client)
> @@ -802,6 +814,11 @@ static int tegra_csi_probe(struct platform_device *pdev)
> return ret;
> }
>
> + csi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi");
> + if (IS_ERR(csi->vdd))
> + return dev_err_probe(&pdev->dev, PTR_ERR(csi->vdd),
> + "failed to get VDD supply");
> +
> if (!pdev->dev.pm_domain) {
> ret = -ENOENT;
> dev_warn(&pdev->dev, "PM domain is not attached: %d\n", ret);
> diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c
> index 2deb615547be..05af718b3cdf 100644
> --- a/drivers/staging/media/tegra-video/vi.c
> +++ b/drivers/staging/media/tegra-video/vi.c
> @@ -1405,29 +1405,19 @@ static int __maybe_unused vi_runtime_resume(struct device *dev)
> struct tegra_vi *vi = dev_get_drvdata(dev);
> int ret;
>
> - ret = regulator_enable(vi->vdd);
> - if (ret) {
> - dev_err(dev, "failed to enable VDD supply: %d\n", ret);
> - return ret;
> - }
> -
> ret = clk_set_rate(vi->clk, vi->soc->vi_max_clk_hz);
> if (ret) {
> dev_err(dev, "failed to set vi clock rate: %d\n", ret);
> - goto disable_vdd;
> + return ret;
> }
>
> ret = clk_prepare_enable(vi->clk);
> if (ret) {
> dev_err(dev, "failed to enable vi clock: %d\n", ret);
> - goto disable_vdd;
> + return ret;
> }
>
> return 0;
> -
> -disable_vdd:
> - regulator_disable(vi->vdd);
> - return ret;
> }
>
> static int __maybe_unused vi_runtime_suspend(struct device *dev)
> @@ -1436,8 +1426,6 @@ static int __maybe_unused vi_runtime_suspend(struct device *dev)
>
> clk_disable_unprepare(vi->clk);
>
> - regulator_disable(vi->vdd);
> -
> return 0;
> }
>
> @@ -1882,13 +1870,6 @@ static int tegra_vi_probe(struct platform_device *pdev)
> return ret;
> }
>
> - vi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi");
> - if (IS_ERR(vi->vdd)) {
> - ret = PTR_ERR(vi->vdd);
> - dev_err(&pdev->dev, "failed to get VDD supply: %d\n", ret);
> - return ret;
> - }
> -
> if (!pdev->dev.pm_domain) {
> ret = -ENOENT;
> dev_warn(&pdev->dev, "PM domain is not attached: %d\n", ret);
> diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h
> index 64655ac1b41f..367667adf745 100644
> --- a/drivers/staging/media/tegra-video/vi.h
> +++ b/drivers/staging/media/tegra-video/vi.h
> @@ -93,7 +93,6 @@ struct tegra_vi_soc {
> * @client: host1x_client struct
> * @iomem: register base
> * @clk: main clock for VI block
> - * @vdd: vdd regulator for VI hardware, normally it is avdd_dsi_csi
> * @soc: pointer to SoC data structure
> * @ops: vi operations
> * @vi_chans: list head for VI channels
> @@ -103,7 +102,6 @@ struct tegra_vi {
> struct host1x_client client;
> void __iomem *iomem;
> struct clk *clk;
> - struct regulator *vdd;
> const struct tegra_vi_soc *soc;
> const struct tegra_vi_ops *ops;
> struct list_head vi_chans;
> diff --git a/include/linux/tegra-csi.h b/include/linux/tegra-csi.h
> index b47f48ef7115..85c74e22a0cb 100644
> --- a/include/linux/tegra-csi.h
> +++ b/include/linux/tegra-csi.h
> @@ -139,6 +139,7 @@ struct tegra_csi_soc {
> * @client: host1x_client struct
> * @iomem: register base
> * @clks: clock for CSI and CIL
> + * @vdd: vdd regulator for CSI hardware, usually avdd_dsi_csi
> * @soc: pointer to SoC data structure
> * @ops: csi operations
> * @mipi_ops: MIPI calibration operations
> @@ -150,6 +151,7 @@ struct tegra_csi {
> struct host1x_client client;
> void __iomem *iomem;
> struct clk_bulk_data *clks;
> + struct regulator *vdd;
> const struct tegra_csi_soc *soc;
> const struct tegra_csi_ops *ops;
> const struct tegra_mipi_ops *mipi_ops;
>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
next prev parent reply other threads:[~2025-09-22 4:11 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-06 13:53 [PATCH v2 00/23] tegra-video: add CSI support for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 01/23] clk: tegra: set CSUS as vi_sensors gate for Tegra20, Tegra30 and Tegra114 Svyatoslav Ryhel
2025-09-19 6:29 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks Svyatoslav Ryhel
2025-09-07 9:34 ` Krzysztof Kozlowski
2025-09-07 9:43 ` Svyatoslav Ryhel
2025-09-07 18:25 ` Krzysztof Kozlowski
2025-09-06 13:53 ` [PATCH v2 03/23] clk: tegra30: add CSI pad clock gates Svyatoslav Ryhel
2025-09-19 6:33 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 04/23] dt-bindings: display: tegra: document Tegra30 VI and VIP Svyatoslav Ryhel
2025-09-06 19:17 ` Rob Herring (Arm)
2025-09-06 13:53 ` [PATCH v2 05/23] staging: media: tegra-video: expand VI and VIP support to Tegra30 Svyatoslav Ryhel
2025-09-17 7:52 ` Luca Ceresoli
2025-09-06 13:53 ` [PATCH v2 06/23] staging: media: tegra-video: vi: adjust get_selection op check Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 07/23] staging: media: tegra-video: vi: add flip controls only if no source controls are provided Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 08/23] staging: media: tegra-video: csi: move CSI helpers to header Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 09/23] gpu: host1x: convert MIPI to use operations Svyatoslav Ryhel
2025-09-19 6:47 ` Mikko Perttunen
2025-09-19 7:58 ` Svyatoslav Ryhel
2025-09-19 8:56 ` Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 10/23] staging: media: tegra-video: csi: add support for SoCs with integrated MIPI calibration Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 11/23] staging: media: tegra-video: csi: add a check to tegra_channel_get_remote_csi_subdev Svyatoslav Ryhel
2025-09-16 16:04 ` Luca Ceresoli
2025-09-16 16:24 ` Svyatoslav Ryhel
2025-09-17 7:25 ` Luca Ceresoli
2025-09-17 7:49 ` Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 12/23] dt-bindings: display: tegra: move avdd-dsi-csi-supply from VI to CSI Svyatoslav Ryhel
2025-09-09 0:49 ` Rob Herring (Arm)
2025-09-09 0:57 ` Rob Herring
2025-09-09 5:00 ` Svyatoslav Ryhel
2025-09-09 16:03 ` Rob Herring
2025-09-06 13:53 ` [PATCH v2 13/23] staging: media: tegra-video: csi: " Svyatoslav Ryhel
2025-09-17 7:52 ` Luca Ceresoli
2025-09-22 4:11 ` Mikko Perttunen [this message]
2025-09-06 13:53 ` [PATCH v2 14/23] staging: media: tegra-video: tegra20: set correct maximum width and height Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 15/23] staging: media: tegra-video: tegra20: add support for second output of VI Svyatoslav Ryhel
2025-09-22 4:29 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 16/23] staging: media: tegra-video: tegra20: simplify format align calculations Svyatoslav Ryhel
2025-09-22 4:44 ` Mikko Perttunen
2025-09-22 5:13 ` Svyatoslav Ryhel
2025-09-22 6:23 ` Mikko Perttunen
2025-09-22 6:30 ` Svyatoslav Ryhel
2025-09-22 7:27 ` Mikko Perttunen
2025-09-22 7:36 ` Svyatoslav Ryhel
2025-09-23 6:03 ` Mikko Perttunen
2025-09-23 6:11 ` Svyatoslav Ryhel
2025-09-23 6:50 ` Svyatoslav Ryhel
2025-09-24 4:47 ` Mikko Perttunen
2025-09-24 10:24 ` Svyatoslav Ryhel
2025-09-24 23:20 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 17/23] staging: media: tegra-video: tegra20: set VI HW revision Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 18/23] staging: media: tegra-video: tegra20: increase maximum VI clock frequency Svyatoslav Ryhel
2025-09-22 4:54 ` Mikko Perttunen
2025-09-22 4:58 ` Svyatoslav Ryhel
2025-09-22 6:23 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 19/23] staging: media: tegra-video: tegra20: expand format support with RAW8/10 and YUV422 1X16 Svyatoslav Ryhel
2025-09-22 5:00 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 20/23] staging: media: tegra-video: tegra20: adjust luma buffer stride Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 21/23] dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI Svyatoslav Ryhel
2025-09-09 16:26 ` Rob Herring
2025-09-09 16:39 ` Svyatoslav Ryhel
2025-09-10 2:13 ` Rob Herring
2025-09-06 13:53 ` [PATCH v2 22/23] ARM: tegra: add CSI nodes for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 23/23] staging: media: tegra-video: add CSI support " Svyatoslav Ryhel
2025-09-15 5:46 ` kernel test robot
2025-09-22 5:15 ` Mikko Perttunen
2025-09-22 5:19 ` Svyatoslav Ryhel
2025-09-22 5:38 ` Mikko Perttunen
2025-09-22 6:16 ` Svyatoslav Ryhel
2025-09-22 6:36 ` Mikko Perttunen
2025-09-11 16:03 ` (subset) [PATCH v2 00/23] " Thierry Reding
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