* [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-18 0:02 ` [PATCH/RFC 0/4] i.MX31 camera host driver + IPU updates Guennadi Liakhovetski
@ 2009-02-18 0:03 ` Guennadi Liakhovetski
2009-02-18 15:09 ` Agustin
2009-02-28 21:31 ` Agustin
2009-02-18 0:03 ` [PATCH 2/4] soc-camera: camera host driver for i.MX3x SoCs Guennadi Liakhovetski
` (2 subsequent siblings)
3 siblings, 2 replies; 17+ messages in thread
From: Guennadi Liakhovetski @ 2009-02-18 0:03 UTC (permalink / raw)
To: Valentin Longchamp
Cc: Agustin, Linux Arm Kernel, Linux Media Mailing List, Dan Williams
From: Guennadi Liakhovetski <lg@denx.de>
General code clean-up: remove superfluous semicolons, update comments.
Robustness improvements: add DMA error handling to the ISR, move common code
fragments to functions, fix scatter-gather element queuing in the ISR, survive
channel freeing and re-allocation in a quick succession.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
---
As mentioned in PATCH 0/4 this one is only for completeness / testing
here, will be submitted separately to the dmaengine queue. Dan, would be
good if you could review it here to save time.
drivers/dma/ipu/ipu_idmac.c | 300 ++++++++++++++++++++++++++++---------------
1 files changed, 196 insertions(+), 104 deletions(-)
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index 1f154d0..91e6e4e 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -28,6 +28,9 @@
#define FS_VF_IN_VALID 0x00000002
#define FS_ENC_IN_VALID 0x00000001
+static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan,
+ bool wait_for_stop);
+
/*
* There can be only one, we could allocate it dynamically, but then we'd have
* to add an extra parameter to some functions, and use something as ugly as
@@ -107,7 +110,7 @@ static uint32_t bytes_per_pixel(enum pixel_fmt fmt)
}
}
-/* Enable / disable direct write to memory by the Camera Sensor Interface */
+/* Enable direct write to memory by the Camera Sensor Interface */
static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
{
uint32_t ic_conf, mask;
@@ -126,6 +129,7 @@ static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
idmac_write_icreg(ipu, ic_conf, IC_CONF);
}
+/* Called under spin_lock_irqsave(&ipu_data.lock) */
static void ipu_ic_disable_task(struct ipu *ipu, enum ipu_channel channel)
{
uint32_t ic_conf, mask;
@@ -422,7 +426,7 @@ static void ipu_ch_param_set_size(union chan_param_mem *params,
break;
default:
dev_err(ipu_data.dev,
- "mxc ipu: unimplemented pixel format %d\n", pixel_fmt);
+ "mx3 ipu: unimplemented pixel format %d\n", pixel_fmt);
break;
}
@@ -433,20 +437,20 @@ static void ipu_ch_param_set_burst_size(union chan_param_mem *params,
uint16_t burst_pixels)
{
params->pp.npb = burst_pixels - 1;
-};
+}
static void ipu_ch_param_set_buffer(union chan_param_mem *params,
dma_addr_t buf0, dma_addr_t buf1)
{
params->pp.eba0 = buf0;
params->pp.eba1 = buf1;
-};
+}
static void ipu_ch_param_set_rotation(union chan_param_mem *params,
enum ipu_rotate_mode rotate)
{
params->pp.bam = rotate;
-};
+}
static void ipu_write_param_mem(uint32_t addr, uint32_t *data,
uint32_t num_words)
@@ -571,7 +575,7 @@ static uint32_t dma_param_addr(uint32_t dma_ch)
{
/* Channel Parameter Memory */
return 0x10000 | (dma_ch << 4);
-};
+}
static void ipu_channel_set_priority(struct ipu *ipu, enum ipu_channel channel,
bool prio)
@@ -611,7 +615,8 @@ static uint32_t ipu_channel_conf_mask(enum ipu_channel channel)
/**
* ipu_enable_channel() - enable an IPU channel.
- * @channel: channel ID.
+ * @idmac: IPU DMAC context.
+ * @ichan: IDMAC channel.
* @return: 0 on success or negative error code on failure.
*/
static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan)
@@ -649,7 +654,7 @@ static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan)
/**
* ipu_init_channel_buffer() - initialize a buffer for logical IPU channel.
- * @channel: channel ID.
+ * @ichan: IDMAC channel.
* @pixel_fmt: pixel format of buffer. Pixel format is a FOURCC ASCII code.
* @width: width of buffer in pixels.
* @height: height of buffer in pixels.
@@ -687,7 +692,7 @@ static int ipu_init_channel_buffer(struct idmac_channel *ichan,
}
/* IC channel's stride must be a multiple of 8 pixels */
- if ((channel <= 13) && (stride % 8)) {
+ if ((channel <= IDMAC_IC_13) && (stride % 8)) {
dev_err(ipu->dev, "Stride must be 8 pixel multiple\n");
return -EINVAL;
}
@@ -752,7 +757,7 @@ static void ipu_select_buffer(enum ipu_channel channel, int buffer_n)
/**
* ipu_update_channel_buffer() - update physical address of a channel buffer.
- * @channel: channel ID.
+ * @ichan: IDMAC channel.
* @buffer_n: buffer number to update.
* 0 or 1 are the only valid values.
* @phyaddr: buffer physical address.
@@ -760,9 +765,10 @@ static void ipu_select_buffer(enum ipu_channel channel, int buffer_n)
* function will fail if the buffer is set to ready.
*/
/* Called under spin_lock(_irqsave)(&ichan->lock) */
-static int ipu_update_channel_buffer(enum ipu_channel channel,
+static int ipu_update_channel_buffer(struct idmac_channel *ichan,
int buffer_n, dma_addr_t phyaddr)
{
+ enum ipu_channel channel = ichan->dma_chan.chan_id;
uint32_t reg;
unsigned long flags;
@@ -771,8 +777,8 @@ static int ipu_update_channel_buffer(enum ipu_channel channel,
if (buffer_n == 0) {
reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
if (reg & (1UL << channel)) {
- spin_unlock_irqrestore(&ipu_data.lock, flags);
- return -EACCES;
+ ipu_ic_disable_task(&ipu_data, channel);
+ ichan->status = IPU_CHANNEL_READY;
}
/* 44.3.3.1.9 - Row Number 1 (WORD1, offset 0) */
@@ -782,8 +788,8 @@ static int ipu_update_channel_buffer(enum ipu_channel channel,
} else {
reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
if (reg & (1UL << channel)) {
- spin_unlock_irqrestore(&ipu_data.lock, flags);
- return -EACCES;
+ ipu_ic_disable_task(&ipu_data, channel);
+ ichan->status = IPU_CHANNEL_READY;
}
/* Check if double-buffering is already enabled */
@@ -805,6 +811,39 @@ static int ipu_update_channel_buffer(enum ipu_channel channel,
}
/* Called under spin_lock_irqsave(&ichan->lock) */
+static int ipu_submit_buffer(struct idmac_channel *ichan,
+ struct idmac_tx_desc *desc, struct scatterlist *sg, int buf_idx)
+{
+ unsigned int chan_id = ichan->dma_chan.chan_id;
+ struct device *dev = &ichan->dma_chan.dev->device;
+ int ret;
+
+ if (async_tx_test_ack(&desc->txd))
+ return -EINTR;
+
+ /*
+ * On first invocation this shouldn't be necessary, the call to
+ * ipu_init_channel_buffer() above will set addresses for us, so we
+ * could make it conditional on status >= IPU_CHANNEL_ENABLED, but
+ * doing it again shouldn't hurt either.
+ */
+ ret = ipu_update_channel_buffer(ichan, buf_idx,
+ sg_dma_address(sg));
+
+ if (ret < 0) {
+ dev_err(dev, "Updating sg %p on channel 0x%x buffer %d failed!\n",
+ sg, chan_id, buf_idx);
+ return ret;
+ }
+
+ ipu_select_buffer(chan_id, buf_idx);
+ dev_dbg(dev, "Updated sg %p on channel 0x%x buffer %d\n",
+ sg, chan_id, buf_idx);
+
+ return 0;
+}
+
+/* Called under spin_lock_irqsave(&ichan->lock) */
static int ipu_submit_channel_buffers(struct idmac_channel *ichan,
struct idmac_tx_desc *desc)
{
@@ -815,20 +854,10 @@ static int ipu_submit_channel_buffers(struct idmac_channel *ichan,
if (!ichan->sg[i]) {
ichan->sg[i] = sg;
- /*
- * On first invocation this shouldn't be necessary, the
- * call to ipu_init_channel_buffer() above will set
- * addresses for us, so we could make it conditional
- * on status >= IPU_CHANNEL_ENABLED, but doing it again
- * shouldn't hurt either.
- */
- ret = ipu_update_channel_buffer(ichan->dma_chan.chan_id, i,
- sg_dma_address(sg));
+ ret = ipu_submit_buffer(ichan, desc, sg, i);
if (ret < 0)
return ret;
- ipu_select_buffer(ichan->dma_chan.chan_id, i);
-
sg = sg_next(sg);
}
}
@@ -842,19 +871,22 @@ static dma_cookie_t idmac_tx_submit(struct dma_async_tx_descriptor *tx)
struct idmac_channel *ichan = to_idmac_chan(tx->chan);
struct idmac *idmac = to_idmac(tx->chan->device);
struct ipu *ipu = to_ipu(idmac);
+ struct device *dev = &ichan->dma_chan.dev->device;
dma_cookie_t cookie;
unsigned long flags;
+ int ret;
/* Sanity check */
if (!list_empty(&desc->list)) {
/* The descriptor doesn't belong to client */
- dev_err(&ichan->dma_chan.dev->device,
- "Descriptor %p not prepared!\n", tx);
+ dev_err(dev, "Descriptor %p not prepared!\n", tx);
return -EBUSY;
}
mutex_lock(&ichan->chan_mutex);
+ async_tx_clear_ack(tx);
+
if (ichan->status < IPU_CHANNEL_READY) {
struct idmac_video_param *video = &ichan->params.video;
/*
@@ -878,16 +910,7 @@ static dma_cookie_t idmac_tx_submit(struct dma_async_tx_descriptor *tx)
goto out;
}
- /* ipu->lock can be taken under ichan->lock, but not v.v. */
- spin_lock_irqsave(&ichan->lock, flags);
-
- /* submit_buffers() atomically verifies and fills empty sg slots */
- cookie = ipu_submit_channel_buffers(ichan, desc);
-
- spin_unlock_irqrestore(&ichan->lock, flags);
-
- if (cookie < 0)
- goto out;
+ dev_dbg(dev, "Submitting sg %p\n", &desc->sg[0]);
cookie = ichan->dma_chan.cookie;
@@ -897,24 +920,40 @@ static dma_cookie_t idmac_tx_submit(struct dma_async_tx_descriptor *tx)
/* from dmaengine.h: "last cookie value returned to client" */
ichan->dma_chan.cookie = cookie;
tx->cookie = cookie;
+
+ /* ipu->lock can be taken under ichan->lock, but not v.v. */
spin_lock_irqsave(&ichan->lock, flags);
+
list_add_tail(&desc->list, &ichan->queue);
+ /* submit_buffers() atomically verifies and fills empty sg slots */
+ ret = ipu_submit_channel_buffers(ichan, desc);
+
spin_unlock_irqrestore(&ichan->lock, flags);
+ if (ret < 0) {
+ cookie = ret;
+ goto dequeue;
+ }
+
if (ichan->status < IPU_CHANNEL_ENABLED) {
- int ret = ipu_enable_channel(idmac, ichan);
+ ret = ipu_enable_channel(idmac, ichan);
if (ret < 0) {
cookie = ret;
- spin_lock_irqsave(&ichan->lock, flags);
- list_del_init(&desc->list);
- spin_unlock_irqrestore(&ichan->lock, flags);
- tx->cookie = cookie;
- ichan->dma_chan.cookie = cookie;
+ goto dequeue;
}
}
dump_idmac_reg(ipu);
+dequeue:
+ if (cookie < 0) {
+ spin_lock_irqsave(&ichan->lock, flags);
+ list_del_init(&desc->list);
+ spin_unlock_irqrestore(&ichan->lock, flags);
+ tx->cookie = cookie;
+ ichan->dma_chan.cookie = cookie;
+ }
+
out:
mutex_unlock(&ichan->chan_mutex);
@@ -1161,6 +1200,24 @@ static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan,
return 0;
}
+static struct scatterlist *idmac_sg_next(struct idmac_channel *ichan,
+ struct idmac_tx_desc **desc, struct scatterlist *sg)
+{
+ struct scatterlist *sgnew = sg ? sg_next(sg) : NULL;
+
+ if (sgnew)
+ /* next sg-element in this list */
+ return sgnew;
+
+ if ((*desc)->list.next == &ichan->queue)
+ /* No more descriptors on the queue */
+ return NULL;
+
+ /* Fetch next descriptor */
+ *desc = list_entry((*desc)->list.next, struct idmac_tx_desc, list);
+ return (*desc)->sg;
+}
+
/*
* We have several possibilities here:
* current BUF next BUF
@@ -1176,23 +1233,46 @@ static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan,
static irqreturn_t idmac_interrupt(int irq, void *dev_id)
{
struct idmac_channel *ichan = dev_id;
+ struct device *dev = &ichan->dma_chan.dev->device;
unsigned int chan_id = ichan->dma_chan.chan_id;
struct scatterlist **sg, *sgnext, *sgnew = NULL;
/* Next transfer descriptor */
- struct idmac_tx_desc *desc = NULL, *descnew;
+ struct idmac_tx_desc *desc, *descnew;
dma_async_tx_callback callback;
void *callback_param;
bool done = false;
- u32 ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY),
- ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY),
- curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF);
+ u32 ready0, ready1, curbuf, err;
+ unsigned long flags;
/* IDMAC has cleared the respective BUFx_RDY bit, we manage the buffer */
- pr_debug("IDMAC irq %d\n", irq);
+ dev_dbg(dev, "IDMAC irq %d, buf %d\n", irq, ichan->active_buffer);
+
+ spin_lock_irqsave(&ipu_data.lock, flags);
+
+ ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
+ ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
+ curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF);
+ err = idmac_read_ipureg(&ipu_data, IPU_INT_STAT_4);
+
+ if (err & (1 << chan_id)) {
+ idmac_write_ipureg(&ipu_data, 1 << chan_id, IPU_INT_STAT_4);
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
+ /*
+ * Doing this
+ * ichan->sg[0] = ichan->sg[1] = NULL;
+ * you can force channel re-enable on the next tx_submit(), but
+ * this is dirty - think about descriptors with multiple
+ * sg elements.
+ */
+ dev_warn(dev, "NFB4EOF on channel %d, ready %x, %x, cur %x\n",
+ chan_id, ready0, ready1, curbuf);
+ return IRQ_HANDLED;
+ }
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
+
/* Other interrupts do not interfere with this channel */
spin_lock(&ichan->lock);
-
if (unlikely(chan_id != IDMAC_SDC_0 && chan_id != IDMAC_SDC_1 &&
((curbuf >> chan_id) & 1) == ichan->active_buffer)) {
int i = 100;
@@ -1207,19 +1287,23 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
if (!i) {
spin_unlock(&ichan->lock);
- dev_dbg(ichan->dma_chan.device->dev,
+ dev_dbg(dev,
"IRQ on active buffer on channel %x, active "
"%d, ready %x, %x, current %x!\n", chan_id,
ichan->active_buffer, ready0, ready1, curbuf);
return IRQ_NONE;
- }
+ } else
+ dev_dbg(dev,
+ "Buffer deactivated on channel %x, active "
+ "%d, ready %x, %x, current %x, rest %d!\n", chan_id,
+ ichan->active_buffer, ready0, ready1, curbuf, i);
}
if (unlikely((ichan->active_buffer && (ready1 >> chan_id) & 1) ||
(!ichan->active_buffer && (ready0 >> chan_id) & 1)
)) {
spin_unlock(&ichan->lock);
- dev_dbg(ichan->dma_chan.device->dev,
+ dev_dbg(dev,
"IRQ with active buffer still ready on channel %x, "
"active %d, ready %x, %x!\n", chan_id,
ichan->active_buffer, ready0, ready1);
@@ -1227,8 +1311,9 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
}
if (unlikely(list_empty(&ichan->queue))) {
+ ichan->sg[ichan->active_buffer] = NULL;
spin_unlock(&ichan->lock);
- dev_err(ichan->dma_chan.device->dev,
+ dev_err(dev,
"IRQ without queued buffers on channel %x, active %d, "
"ready %x, %x!\n", chan_id,
ichan->active_buffer, ready0, ready1);
@@ -1243,40 +1328,44 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
sg = &ichan->sg[ichan->active_buffer];
sgnext = ichan->sg[!ichan->active_buffer];
+ if (!*sg) {
+ spin_unlock(&ichan->lock);
+ return IRQ_HANDLED;
+ }
+
+ desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
+ descnew = desc;
+
+ dev_dbg(dev, "IDMAC irq %d, dma 0x%08x, next dma 0x%08x, current %d, curbuf 0x%08x\n",
+ irq, sg_dma_address(*sg), sgnext ? sg_dma_address(sgnext) : 0, ichan->active_buffer, curbuf);
+
+ /* Find the descriptor of sgnext */
+ sgnew = idmac_sg_next(ichan, &descnew, *sg);
+ if (sgnext != sgnew)
+ dev_err(dev, "Submitted buffer %p, next buffer %p\n", sgnext, sgnew);
+
/*
* if sgnext == NULL sg must be the last element in a scatterlist and
* queue must be empty
*/
if (unlikely(!sgnext)) {
- if (unlikely(sg_next(*sg))) {
- dev_err(ichan->dma_chan.device->dev,
- "Broken buffer-update locking on channel %x!\n",
- chan_id);
- /* We'll let the user catch up */
+ if (!WARN_ON(sg_next(*sg)))
+ dev_dbg(dev, "Underrun on channel %x\n", chan_id);
+ ichan->sg[!ichan->active_buffer] = sgnew;
+
+ if (unlikely(sgnew)) {
+ ipu_submit_buffer(ichan, descnew, sgnew, !ichan->active_buffer);
} else {
- /* Underrun */
+ spin_lock_irqsave(&ipu_data.lock, flags);
ipu_ic_disable_task(&ipu_data, chan_id);
- dev_dbg(ichan->dma_chan.device->dev,
- "Underrun on channel %x\n", chan_id);
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
ichan->status = IPU_CHANNEL_READY;
/* Continue to check for complete descriptor */
}
}
- desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
-
- /* First calculate and submit the next sg element */
- if (likely(sgnext))
- sgnew = sg_next(sgnext);
-
- if (unlikely(!sgnew)) {
- /* Start a new scatterlist, if any queued */
- if (likely(desc->list.next != &ichan->queue)) {
- descnew = list_entry(desc->list.next,
- struct idmac_tx_desc, list);
- sgnew = &descnew->sg[0];
- }
- }
+ /* Calculate and submit the next sg element */
+ sgnew = idmac_sg_next(ichan, &descnew, sgnew);
if (unlikely(!sg_next(*sg)) || !sgnext) {
/*
@@ -1289,17 +1378,13 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
*sg = sgnew;
- if (likely(sgnew)) {
- int ret;
-
- ret = ipu_update_channel_buffer(chan_id, ichan->active_buffer,
- sg_dma_address(*sg));
- if (ret < 0)
- dev_err(ichan->dma_chan.device->dev,
- "Failed to update buffer on channel %x buffer %d!\n",
- chan_id, ichan->active_buffer);
- else
- ipu_select_buffer(chan_id, ichan->active_buffer);
+ if (likely(sgnew) &&
+ ipu_submit_buffer(ichan, descnew, sgnew, ichan->active_buffer) < 0) {
+ callback = desc->txd.callback;
+ callback_param = desc->txd.callback_param;
+ spin_unlock(&ichan->lock);
+ callback(callback_param);
+ spin_lock(&ichan->lock);
}
/* Flip the active buffer - even if update above failed */
@@ -1327,13 +1412,20 @@ static void ipu_gc_tasklet(unsigned long arg)
struct idmac_channel *ichan = ipu->channel + i;
struct idmac_tx_desc *desc;
unsigned long flags;
- int j;
+ struct scatterlist *sg;
+ int j, k;
for (j = 0; j < ichan->n_tx_desc; j++) {
desc = ichan->desc + j;
spin_lock_irqsave(&ichan->lock, flags);
if (async_tx_test_ack(&desc->txd)) {
list_move(&desc->list, &ichan->free_list);
+ for_each_sg(desc->sg, sg, desc->sg_len, k) {
+ if (ichan->sg[0] == sg)
+ ichan->sg[0] = NULL;
+ else if (ichan->sg[1] == sg)
+ ichan->sg[1] = NULL;
+ }
async_tx_clear_ack(&desc->txd);
}
spin_unlock_irqrestore(&ichan->lock, flags);
@@ -1341,13 +1433,7 @@ static void ipu_gc_tasklet(unsigned long arg)
}
}
-/*
- * At the time .device_alloc_chan_resources() method is called, we cannot know,
- * whether the client will accept the channel. Thus we must only check, if we
- * can satisfy client's request but the only real criterion to verify, whether
- * the client has accepted our offer is the client_count. That's why we have to
- * perform the rest of our allocation tasks on the first call to this function.
- */
+/* Just allocate and initialise a transfer descriptor. */
static struct dma_async_tx_descriptor *idmac_prep_slave_sg(struct dma_chan *chan,
struct scatterlist *sgl, unsigned int sg_len,
enum dma_data_direction direction, unsigned long tx_flags)
@@ -1432,8 +1518,7 @@ static void __idmac_terminate_all(struct dma_chan *chan)
struct idmac_tx_desc *desc = ichan->desc + i;
if (list_empty(&desc->list))
/* Descriptor was prepared, but not submitted */
- list_add(&desc->list,
- &ichan->free_list);
+ list_add(&desc->list, &ichan->free_list);
async_tx_clear_ack(&desc->txd);
}
@@ -1476,15 +1561,22 @@ static int idmac_alloc_chan_resources(struct dma_chan *chan)
goto eimap;
ichan->eof_irq = ret;
- ret = request_irq(ichan->eof_irq, idmac_interrupt, 0,
- ichan->eof_name, ichan);
- if (ret < 0)
- goto erirq;
+
+ /*
+ * Important to first disable the channel, because maybe someone
+ * used it before us, e.g., the bootloader
+ */
+ ipu_disable_channel(idmac, ichan, true);
ret = ipu_init_channel(idmac, ichan);
if (ret < 0)
goto eichan;
+ ret = request_irq(ichan->eof_irq, idmac_interrupt, 0,
+ ichan->eof_name, ichan);
+ if (ret < 0)
+ goto erirq;
+
ichan->status = IPU_CHANNEL_INITIALIZED;
dev_dbg(&ichan->dma_chan.dev->device, "Found channel 0x%x, irq %d\n",
@@ -1492,9 +1584,9 @@ static int idmac_alloc_chan_resources(struct dma_chan *chan)
return ret;
-eichan:
- free_irq(ichan->eof_irq, ichan);
erirq:
+ ipu_uninit_channel(idmac, ichan);
+eichan:
ipu_irq_unmap(ichan->dma_chan.chan_id);
eimap:
return ret;
@@ -1600,7 +1692,7 @@ static void ipu_idmac_exit(struct ipu *ipu)
* IPU common probe / remove
*/
-static int ipu_probe(struct platform_device *pdev)
+static int __init ipu_probe(struct platform_device *pdev)
{
struct ipu_platform_data *pdata = pdev->dev.platform_data;
struct resource *mem_ipu, *mem_ic;
--
1.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-18 0:03 ` [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements Guennadi Liakhovetski
@ 2009-02-18 15:09 ` Agustin
2009-02-18 15:21 ` Guennadi Liakhovetski
2009-02-18 20:07 ` Russell King - ARM Linux
2009-02-28 21:31 ` Agustin
1 sibling, 2 replies; 17+ messages in thread
From: Agustin @ 2009-02-18 15:09 UTC (permalink / raw)
To: Guennadi Liakhovetski, Valentin Longchamp
Cc: Linux Arm Kernel, Linux Media Mailing List, Dan Williams
Guennadi,
> Guennadi Liakhovetski wrote:
>
> From: Guennadi Liakhovetski
>
> General code clean-up: remove superfluous semicolons, update comments.
> Robustness improvements: add DMA error handling to the ISR, move common code
> fragments to functions, fix scatter-gather element queuing in the ISR, survive
> channel freeing and re-allocation in a quick succession.
>
> Signed-off-by: Guennadi Liakhovetski
> ---
>
> As mentioned in PATCH 0/4 this one is only for completeness / testing
> here, will be submitted separately to the dmaengine queue. Dan, would be
> good if you could review it here to save time.
>
> drivers/dma/ipu/ipu_idmac.c | 300 ++++++++++++++++++++++++++++---------------
> 1 files changed, 196 insertions(+), 104 deletions(-)
>
> diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
> index 1f154d0..91e6e4e 100644
> --- a/drivers/dma/ipu/ipu_idmac.c
> +++ b/drivers/dma/ipu/ipu_idmac.c
> @@ -28,6 +28,9 @@
> #define FS_VF_IN_VALID 0x00000002
> #define FS_ENC_IN_VALID 0x00000001
>
> +static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel
> *ichan,
> + bool wait_for_stop);
> +
> /*
> ...
Thanks a lot for the patchset!
I am having some stoopid trouble while trying to apply this patch to 'mxc-master':
$ patch -p1 --dry-run < p1
patching file drivers/dma/ipu/ipu_idmac.c
patch: **** malformed patch at line 29: /*
Looks like your patches lost their format while on their way, specially every single line with a starting space has had it removed. Or is it my e-mail reader? I am trying to fix it manually, no luck.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-18 15:09 ` Agustin
@ 2009-02-18 15:21 ` Guennadi Liakhovetski
2009-02-18 20:07 ` Russell King - ARM Linux
1 sibling, 0 replies; 17+ messages in thread
From: Guennadi Liakhovetski @ 2009-02-18 15:21 UTC (permalink / raw)
To: Agustin
Cc: Valentin Longchamp, Linux Arm Kernel, Linux Media Mailing List,
Dan Williams
On Wed, 18 Feb 2009, Agustin wrote:
> I am having some stoopid trouble while trying to apply this patch to 'mxc-master':
> $ patch -p1 --dry-run < p1
> patching file drivers/dma/ipu/ipu_idmac.c
> patch: **** malformed patch at line 29: /*
>
> Looks like your patches lost their format while on their way, specially
> every single line with a starting space has had it removed. Or is it my
> e-mail reader? I am trying to fix it manually, no luck.
I would tip at your reader - I just saved my emails, that I received back
from the list and applied them - no problem.
In fact, there is a small problem with the main camera patch - Kconfig and
Makefile hunks do not apply to Linus' ToT, but that's easy to fix, I'll
fix it up for pull.
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-18 15:09 ` Agustin
2009-02-18 15:21 ` Guennadi Liakhovetski
@ 2009-02-18 20:07 ` Russell King - ARM Linux
2009-02-18 21:32 ` Agustin
1 sibling, 1 reply; 17+ messages in thread
From: Russell King - ARM Linux @ 2009-02-18 20:07 UTC (permalink / raw)
To: Agustin
Cc: Guennadi Liakhovetski, Valentin Longchamp, Linux Arm Kernel,
Linux Media Mailing List, Dan Williams
On Wed, Feb 18, 2009 at 07:09:55AM -0800, Agustin wrote:
> Guennadi,
> > Guennadi Liakhovetski wrote:
> > diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
> > index 1f154d0..91e6e4e 100644
> > --- a/drivers/dma/ipu/ipu_idmac.c
> > +++ b/drivers/dma/ipu/ipu_idmac.c
> > @@ -28,6 +28,9 @@
> > #define FS_VF_IN_VALID 0x00000002
> > #define FS_ENC_IN_VALID 0x00000001
> >
> > +static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel
> > *ichan,
> > + bool wait_for_stop);
> > +
> > /*
> > ...
>...
> $ patch -p1 --dry-run < p1
> patching file drivers/dma/ipu/ipu_idmac.c
> patch: **** malformed patch at line 29: /*
>
> Looks like your patches lost their format while on their way,
> specially every single line with a starting space has had it
> removed. Or is it my e-mail reader? I am trying to fix it manually,
> no luck.
I think it's your mail reader - the version I have here is fine.
What you could do is look up the message in the mailing list archive
on lists.arm.linux.org.uk, and use the '(text/plain)' link to download
an unmangled copy of it.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-18 20:07 ` Russell King - ARM Linux
@ 2009-02-18 21:32 ` Agustin
0 siblings, 0 replies; 17+ messages in thread
From: Agustin @ 2009-02-18 21:32 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Guennadi Liakhovetski, Valentin Longchamp, Linux Arm Kernel,
Linux Media Mailing List
--- On 18/2/09, Russell King -wrote:
> On Wed, Feb 18, 2009 at 07:09:55AM -0800, Agustin wrote:
> > $ patch -p1 --dry-run < p1
> > patching file drivers/dma/ipu/ipu_idmac.c
> > patch: **** malformed patch at line 29: /*
> >
> > Looks like your patches lost their format while on their way,
> > specially every single line with a starting space has had it
> > removed. Or is it my e-mail reader? I am trying to fix it
> > manually, no luck.
>
> I think it's your mail reader - the version I have here is fine.
> What you could do is look up the message in the mailing list
> archive on lists.arm.linux.org.uk, and use the '(text/plain)'
> link to download an unmangled copy of it.
Thanks, that worked fine.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-18 0:03 ` [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements Guennadi Liakhovetski
2009-02-18 15:09 ` Agustin
@ 2009-02-28 21:31 ` Agustin
2009-02-28 21:55 ` Guennadi Liakhovetski
1 sibling, 1 reply; 17+ messages in thread
From: Agustin @ 2009-02-28 21:31 UTC (permalink / raw)
To: Guennadi Liakhovetski
Cc: Linux Arm Kernel, Linux Media Mailing List, Dan Williams
Hi Guennadi,
I am having trouble while probing ipu idmac:
At boot:
ipu-core: probe of ipu-core failed with error -22
Which is apparently happening at ipu_idmac:1706:
1695 static int __init ipu_probe(struct platform_device *pdev)
...
1703 mem_ipu = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1704 mem_ic = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1705 if (!pdata || !mem_ipu || !mem_ic)
1706 return -EINVAL;
Later on, I get error 16, "Device or resource busy" on VIDIOC_S_FMT, apparently because mx3_camera can't get its dma channel.
Any clue?
--
Agustin Ferrin Pozuelo
Embedded Systems Consultant
http://embedded.ferrin.org/
--- On 18/2/09, Guennadi Liakhovetski wrote:
From: Guennadi Liakhovetski <lg@denx.de>
General code clean-up: remove superfluous semicolons, update comments.
Robustness improvements: add DMA error handling to the ISR, move common code
fragments to functions, fix scatter-gather element queuing in the ISR, survive
channel freeing and re-allocation in a quick succession.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
---
As mentioned in PATCH 0/4 this one is only for completeness / testing
here, will be submitted separately to the dmaengine queue. Dan, would be
good if you could review it here to save time.
drivers/dma/ipu/ipu_idmac.c | 300 ++++++++++++++++++++++++++++---------------
1 files changed, 196 insertions(+), 104 deletions(-)
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index 1f154d0..91e6e4e 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -28,6 +28,9 @@
#define FS_VF_IN_VALID 0x00000002
#define FS_ENC_IN_VALID 0x00000001
+static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel
*ichan,
+ bool wait_for_stop);
+
/*
* There can be only one, we could allocate it dynamically, but then we'd
have
* to add an extra parameter to some functions, and use something as ugly as
@@ -107,7 +110,7 @@ static uint32_t bytes_per_pixel(enum pixel_fmt fmt)
}
}
-/* Enable / disable direct write to memory by the Camera Sensor Interface */
+/* Enable direct write to memory by the Camera Sensor Interface */
static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
{
uint32_t ic_conf, mask;
@@ -126,6 +129,7 @@ static void ipu_ic_enable_task(struct ipu *ipu, enum
ipu_channel channel)
idmac_write_icreg(ipu, ic_conf, IC_CONF);
}
+/* Called under spin_lock_irqsave(&ipu_data.lock) */
static void ipu_ic_disable_task(struct ipu *ipu, enum ipu_channel channel)
{
uint32_t ic_conf, mask;
@@ -422,7 +426,7 @@ static void ipu_ch_param_set_size(union chan_param_mem
*params,
break;
default:
dev_err(ipu_data.dev,
- "mxc ipu: unimplemented pixel format %d\n", pixel_fmt);
+ "mx3 ipu: unimplemented pixel format %d\n", pixel_fmt);
break;
}
@@ -433,20 +437,20 @@ static void ipu_ch_param_set_burst_size(union
chan_param_mem *params,
uint16_t burst_pixels)
{
params->pp.npb = burst_pixels - 1;
-};
+}
static void ipu_ch_param_set_buffer(union chan_param_mem *params,
dma_addr_t buf0, dma_addr_t buf1)
{
params->pp.eba0 = buf0;
params->pp.eba1 = buf1;
-};
+}
static void ipu_ch_param_set_rotation(union chan_param_mem *params,
enum ipu_rotate_mode rotate)
{
params->pp.bam = rotate;
-};
+}
static void ipu_write_param_mem(uint32_t addr, uint32_t *data,
uint32_t num_words)
@@ -571,7 +575,7 @@ static uint32_t dma_param_addr(uint32_t dma_ch)
{
/* Channel Parameter Memory */
return 0x10000 | (dma_ch << 4);
-};
+}
static void ipu_channel_set_priority(struct ipu *ipu, enum ipu_channel
channel,
bool prio)
@@ -611,7 +615,8 @@ static uint32_t ipu_channel_conf_mask(enum ipu_channel
channel)
/**
* ipu_enable_channel() - enable an IPU channel.
- * @channel: channel ID.
+ * @idmac: IPU DMAC context.
+ * @ichan: IDMAC channel.
* @return: 0 on success or negative error code on failure.
*/
static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel
*ichan)
@@ -649,7 +654,7 @@ static int ipu_enable_channel(struct idmac *idmac, struct
idmac_channel *ichan)
/**
* ipu_init_channel_buffer() - initialize a buffer for logical IPU channel.
- * @channel: channel ID.
+ * @ichan: IDMAC channel.
* @pixel_fmt: pixel format of buffer. Pixel format is a FOURCC ASCII code.
* @width: width of buffer in pixels.
* @height: height of buffer in pixels.
@@ -687,7 +692,7 @@ static int ipu_init_channel_buffer(struct idmac_channel
*ichan,
}
/* IC channel's stride must be a multiple of 8 pixels */
- if ((channel <= 13) && (stride % 8)) {
+ if ((channel <= IDMAC_IC_13) && (stride % 8)) {
dev_err(ipu->dev, "Stride must be 8 pixel multiple\n");
return -EINVAL;
}
@@ -752,7 +757,7 @@ static void ipu_select_buffer(enum ipu_channel channel, int
buffer_n)
/**
* ipu_update_channel_buffer() - update physical address of a channel buffer.
- * @channel: channel ID.
+ * @ichan: IDMAC channel.
* @buffer_n: buffer number to update.
* 0 or 1 are the only valid values.
* @phyaddr: buffer physical address.
@@ -760,9 +765,10 @@ static void ipu_select_buffer(enum ipu_channel channel,
int buffer_n)
* function will fail if the buffer is set to ready.
*/
/* Called under spin_lock(_irqsave)(&ichan->lock) */
-static int ipu_update_channel_buffer(enum ipu_channel channel,
+static int ipu_update_channel_buffer(struct idmac_channel *ichan,
int buffer_n, dma_addr_t phyaddr)
{
+ enum ipu_channel channel = ichan->dma_chan.chan_id;
uint32_t reg;
unsigned long flags;
@@ -771,8 +777,8 @@ static int ipu_update_channel_buffer(enum ipu_channel
channel,
if (buffer_n == 0) {
reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
if (reg & (1UL << channel)) {
- spin_unlock_irqrestore(&ipu_data.lock, flags);
- return -EACCES;
+ ipu_ic_disable_task(&ipu_data, channel);
+ ichan->status = IPU_CHANNEL_READY;
}
/* 44.3.3.1.9 - Row Number 1 (WORD1, offset 0) */
@@ -782,8 +788,8 @@ static int ipu_update_channel_buffer(enum ipu_channel
channel,
} else {
reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
if (reg & (1UL << channel)) {
- spin_unlock_irqrestore(&ipu_data.lock, flags);
- return -EACCES;
+ ipu_ic_disable_task(&ipu_data, channel);
+ ichan->status = IPU_CHANNEL_READY;
}
/* Check if double-buffering is already enabled */
@@ -805,6 +811,39 @@ static int ipu_update_channel_buffer(enum ipu_channel
channel,
}
/* Called under spin_lock_irqsave(&ichan->lock) */
+static int ipu_submit_buffer(struct idmac_channel *ichan,
+ struct idmac_tx_desc *desc, struct scatterlist *sg, int buf_idx)
+{
+ unsigned int chan_id = ichan->dma_chan.chan_id;
+ struct device *dev = &ichan->dma_chan.dev->device;
+ int ret;
+
+ if (async_tx_test_ack(&desc->txd))
+ return -EINTR;
+
+ /*
+ * On first invocation this shouldn't be necessary, the call to
+ * ipu_init_channel_buffer() above will set addresses for us, so we
+ * could make it conditional on status >= IPU_CHANNEL_ENABLED, but
+ * doing it again shouldn't hurt either.
+ */
+ ret = ipu_update_channel_buffer(ichan, buf_idx,
+ sg_dma_address(sg));
+
+ if (ret < 0) {
+ dev_err(dev, "Updating sg %p on channel 0x%x buffer %d
failed!\n",
+ sg, chan_id, buf_idx);
+ return ret;
+ }
+
+ ipu_select_buffer(chan_id, buf_idx);
+ dev_dbg(dev, "Updated sg %p on channel 0x%x buffer %d\n",
+ sg, chan_id, buf_idx);
+
+ return 0;
+}
+
+/* Called under spin_lock_irqsave(&ichan->lock) */
static int ipu_submit_channel_buffers(struct idmac_channel *ichan,
struct idmac_tx_desc *desc)
{
@@ -815,20 +854,10 @@ static int ipu_submit_channel_buffers(struct
idmac_channel *ichan,
if (!ichan->sg[i]) {
ichan->sg[i] = sg;
- /*
- * On first invocation this shouldn't be necessary, the
- * call to ipu_init_channel_buffer() above will set
- * addresses for us, so we could make it conditional
- * on status >= IPU_CHANNEL_ENABLED, but doing it again
- * shouldn't hurt either.
- */
- ret = ipu_update_channel_buffer(ichan->dma_chan.chan_id, i,
- sg_dma_address(sg));
+ ret = ipu_submit_buffer(ichan, desc, sg, i);
if (ret < 0)
return ret;
- ipu_select_buffer(ichan->dma_chan.chan_id, i);
-
sg = sg_next(sg);
}
}
@@ -842,19 +871,22 @@ static dma_cookie_t idmac_tx_submit(struct
dma_async_tx_descriptor *tx)
struct idmac_channel *ichan = to_idmac_chan(tx->chan);
struct idmac *idmac = to_idmac(tx->chan->device);
struct ipu *ipu = to_ipu(idmac);
+ struct device *dev = &ichan->dma_chan.dev->device;
dma_cookie_t cookie;
unsigned long flags;
+ int ret;
/* Sanity check */
if (!list_empty(&desc->list)) {
/* The descriptor doesn't belong to client */
- dev_err(&ichan->dma_chan.dev->device,
- "Descriptor %p not prepared!\n", tx);
+ dev_err(dev, "Descriptor %p not prepared!\n", tx);
return -EBUSY;
}
mutex_lock(&ichan->chan_mutex);
+ async_tx_clear_ack(tx);
+
if (ichan->status < IPU_CHANNEL_READY) {
struct idmac_video_param *video = &ichan->params.video;
/*
@@ -878,16 +910,7 @@ static dma_cookie_t idmac_tx_submit(struct
dma_async_tx_descriptor *tx)
goto out;
}
- /* ipu->lock can be taken under ichan->lock, but not v.v. */
- spin_lock_irqsave(&ichan->lock, flags);
-
- /* submit_buffers() atomically verifies and fills empty sg slots */
- cookie = ipu_submit_channel_buffers(ichan, desc);
-
- spin_unlock_irqrestore(&ichan->lock, flags);
-
- if (cookie < 0)
- goto out;
+ dev_dbg(dev, "Submitting sg %p\n", &desc->sg[0]);
cookie = ichan->dma_chan.cookie;
@@ -897,24 +920,40 @@ static dma_cookie_t idmac_tx_submit(struct
dma_async_tx_descriptor *tx)
/* from dmaengine.h: "last cookie value returned to client" */
ichan->dma_chan.cookie = cookie;
tx->cookie = cookie;
+
+ /* ipu->lock can be taken under ichan->lock, but not v.v. */
spin_lock_irqsave(&ichan->lock, flags);
+
list_add_tail(&desc->list, &ichan->queue);
+ /* submit_buffers() atomically verifies and fills empty sg slots */
+ ret = ipu_submit_channel_buffers(ichan, desc);
+
spin_unlock_irqrestore(&ichan->lock, flags);
+ if (ret < 0) {
+ cookie = ret;
+ goto dequeue;
+ }
+
if (ichan->status < IPU_CHANNEL_ENABLED) {
- int ret = ipu_enable_channel(idmac, ichan);
+ ret = ipu_enable_channel(idmac, ichan);
if (ret < 0) {
cookie = ret;
- spin_lock_irqsave(&ichan->lock, flags);
- list_del_init(&desc->list);
- spin_unlock_irqrestore(&ichan->lock, flags);
- tx->cookie = cookie;
- ichan->dma_chan.cookie = cookie;
+ goto dequeue;
}
}
dump_idmac_reg(ipu);
+dequeue:
+ if (cookie < 0) {
+ spin_lock_irqsave(&ichan->lock, flags);
+ list_del_init(&desc->list);
+ spin_unlock_irqrestore(&ichan->lock, flags);
+ tx->cookie = cookie;
+ ichan->dma_chan.cookie = cookie;
+ }
+
out:
mutex_unlock(&ichan->chan_mutex);
@@ -1161,6 +1200,24 @@ static int ipu_disable_channel(struct idmac *idmac,
struct idmac_channel *ichan,
return 0;
}
+static struct scatterlist *idmac_sg_next(struct idmac_channel *ichan,
+ struct idmac_tx_desc **desc, struct scatterlist *sg)
+{
+ struct scatterlist *sgnew = sg ? sg_next(sg) : NULL;
+
+ if (sgnew)
+ /* next sg-element in this list */
+ return sgnew;
+
+ if ((*desc)->list.next == &ichan->queue)
+ /* No more descriptors on the queue */
+ return NULL;
+
+ /* Fetch next descriptor */
+ *desc = list_entry((*desc)->list.next, struct idmac_tx_desc, list);
+ return (*desc)->sg;
+}
+
/*
* We have several possibilities here:
* current BUF next BUF
@@ -1176,23 +1233,46 @@ static int ipu_disable_channel(struct idmac *idmac,
struct idmac_channel *ichan,
static irqreturn_t idmac_interrupt(int irq, void *dev_id)
{
struct idmac_channel *ichan = dev_id;
+ struct device *dev = &ichan->dma_chan.dev->device;
unsigned int chan_id = ichan->dma_chan.chan_id;
struct scatterlist **sg, *sgnext, *sgnew = NULL;
/* Next transfer descriptor */
- struct idmac_tx_desc *desc = NULL, *descnew;
+ struct idmac_tx_desc *desc, *descnew;
dma_async_tx_callback callback;
void *callback_param;
bool done = false;
- u32 ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY),
- ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY),
- curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF);
+ u32 ready0, ready1, curbuf, err;
+ unsigned long flags;
/* IDMAC has cleared the respective BUFx_RDY bit, we manage the buffer */
- pr_debug("IDMAC irq %d\n", irq);
+ dev_dbg(dev, "IDMAC irq %d, buf %d\n", irq,
ichan->active_buffer);
+
+ spin_lock_irqsave(&ipu_data.lock, flags);
+
+ ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
+ ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
+ curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF);
+ err = idmac_read_ipureg(&ipu_data, IPU_INT_STAT_4);
+
+ if (err & (1 << chan_id)) {
+ idmac_write_ipureg(&ipu_data, 1 << chan_id, IPU_INT_STAT_4);
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
+ /*
+ * Doing this
+ * ichan->sg[0] = ichan->sg[1] = NULL;
+ * you can force channel re-enable on the next tx_submit(), but
+ * this is dirty - think about descriptors with multiple
+ * sg elements.
+ */
+ dev_warn(dev, "NFB4EOF on channel %d, ready %x, %x, cur %x\n",
+ chan_id, ready0, ready1, curbuf);
+ return IRQ_HANDLED;
+ }
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
+
/* Other interrupts do not interfere with this channel */
spin_lock(&ichan->lock);
-
if (unlikely(chan_id != IDMAC_SDC_0 && chan_id != IDMAC_SDC_1
&&
((curbuf >> chan_id) & 1) == ichan->active_buffer)) {
int i = 100;
@@ -1207,19 +1287,23 @@ static irqreturn_t idmac_interrupt(int irq, void
*dev_id)
if (!i) {
spin_unlock(&ichan->lock);
- dev_dbg(ichan->dma_chan.device->dev,
+ dev_dbg(dev,
"IRQ on active buffer on channel %x, active "
"%d, ready %x, %x, current %x!\n", chan_id,
ichan->active_buffer, ready0, ready1, curbuf);
return IRQ_NONE;
- }
+ } else
+ dev_dbg(dev,
+ "Buffer deactivated on channel %x, active "
+ "%d, ready %x, %x, current %x, rest %d!\n", chan_id,
+ ichan->active_buffer, ready0, ready1, curbuf, i);
}
if (unlikely((ichan->active_buffer && (ready1 >> chan_id)
& 1) ||
(!ichan->active_buffer && (ready0 >> chan_id) & 1)
)) {
spin_unlock(&ichan->lock);
- dev_dbg(ichan->dma_chan.device->dev,
+ dev_dbg(dev,
"IRQ with active buffer still ready on channel %x, "
"active %d, ready %x, %x!\n", chan_id,
ichan->active_buffer, ready0, ready1);
@@ -1227,8 +1311,9 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
}
if (unlikely(list_empty(&ichan->queue))) {
+ ichan->sg[ichan->active_buffer] = NULL;
spin_unlock(&ichan->lock);
- dev_err(ichan->dma_chan.device->dev,
+ dev_err(dev,
"IRQ without queued buffers on channel %x, active %d, "
"ready %x, %x!\n", chan_id,
ichan->active_buffer, ready0, ready1);
@@ -1243,40 +1328,44 @@ static irqreturn_t idmac_interrupt(int irq, void
*dev_id)
sg = &ichan->sg[ichan->active_buffer];
sgnext = ichan->sg[!ichan->active_buffer];
+ if (!*sg) {
+ spin_unlock(&ichan->lock);
+ return IRQ_HANDLED;
+ }
+
+ desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
+ descnew = desc;
+
+ dev_dbg(dev, "IDMAC irq %d, dma 0x%08x, next dma 0x%08x, current %d,
curbuf 0x%08x\n",
+ irq, sg_dma_address(*sg), sgnext ? sg_dma_address(sgnext) : 0,
ichan->active_buffer, curbuf);
+
+ /* Find the descriptor of sgnext */
+ sgnew = idmac_sg_next(ichan, &descnew, *sg);
+ if (sgnext != sgnew)
+ dev_err(dev, "Submitted buffer %p, next buffer %p\n", sgnext,
sgnew);
+
/*
* if sgnext == NULL sg must be the last element in a scatterlist and
* queue must be empty
*/
if (unlikely(!sgnext)) {
- if (unlikely(sg_next(*sg))) {
- dev_err(ichan->dma_chan.device->dev,
- "Broken buffer-update locking on channel %x!\n",
- chan_id);
- /* We'll let the user catch up */
+ if (!WARN_ON(sg_next(*sg)))
+ dev_dbg(dev, "Underrun on channel %x\n", chan_id);
+ ichan->sg[!ichan->active_buffer] = sgnew;
+
+ if (unlikely(sgnew)) {
+ ipu_submit_buffer(ichan, descnew, sgnew, !ichan->active_buffer);
} else {
- /* Underrun */
+ spin_lock_irqsave(&ipu_data.lock, flags);
ipu_ic_disable_task(&ipu_data, chan_id);
- dev_dbg(ichan->dma_chan.device->dev,
- "Underrun on channel %x\n", chan_id);
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
ichan->status = IPU_CHANNEL_READY;
/* Continue to check for complete descriptor */
}
}
- desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
-
- /* First calculate and submit the next sg element */
- if (likely(sgnext))
- sgnew = sg_next(sgnext);
-
- if (unlikely(!sgnew)) {
- /* Start a new scatterlist, if any queued */
- if (likely(desc->list.next != &ichan->queue)) {
- descnew = list_entry(desc->list.next,
- struct idmac_tx_desc, list);
- sgnew = &descnew->sg[0];
- }
- }
+ /* Calculate and submit the next sg element */
+ sgnew = idmac_sg_next(ichan, &descnew, sgnew);
if (unlikely(!sg_next(*sg)) || !sgnext) {
/*
@@ -1289,17 +1378,13 @@ static irqreturn_t idmac_interrupt(int irq, void
*dev_id)
*sg = sgnew;
- if (likely(sgnew)) {
- int ret;
-
- ret = ipu_update_channel_buffer(chan_id, ichan->active_buffer,
- sg_dma_address(*sg));
- if (ret < 0)
- dev_err(ichan->dma_chan.device->dev,
- "Failed to update buffer on channel %x buffer %d!\n",
- chan_id, ichan->active_buffer);
- else
- ipu_select_buffer(chan_id, ichan->active_buffer);
+ if (likely(sgnew) &&
+ ipu_submit_buffer(ichan, descnew, sgnew, ichan->active_buffer) < 0)
{
+ callback = desc->txd.callback;
+ callback_param = desc->txd.callback_param;
+ spin_unlock(&ichan->lock);
+ callback(callback_param);
+ spin_lock(&ichan->lock);
}
/* Flip the active buffer - even if update above failed */
@@ -1327,13 +1412,20 @@ static void ipu_gc_tasklet(unsigned long arg)
struct idmac_channel *ichan = ipu->channel + i;
struct idmac_tx_desc *desc;
unsigned long flags;
- int j;
+ struct scatterlist *sg;
+ int j, k;
for (j = 0; j < ichan->n_tx_desc; j++) {
desc = ichan->desc + j;
spin_lock_irqsave(&ichan->lock, flags);
if (async_tx_test_ack(&desc->txd)) {
list_move(&desc->list, &ichan->free_list);
+ for_each_sg(desc->sg, sg, desc->sg_len, k) {
+ if (ichan->sg[0] == sg)
+ ichan->sg[0] = NULL;
+ else if (ichan->sg[1] == sg)
+ ichan->sg[1] = NULL;
+ }
async_tx_clear_ack(&desc->txd);
}
spin_unlock_irqrestore(&ichan->lock, flags);
@@ -1341,13 +1433,7 @@ static void ipu_gc_tasklet(unsigned long arg)
}
}
-/*
- * At the time .device_alloc_chan_resources() method is called, we cannot
know,
- * whether the client will accept the channel. Thus we must only check, if we
- * can satisfy client's request but the only real criterion to verify,
whether
- * the client has accepted our offer is the client_count. That's why we
have to
- * perform the rest of our allocation tasks on the first call to this
function.
- */
+/* Just allocate and initialise a transfer descriptor. */
static struct dma_async_tx_descriptor *idmac_prep_slave_sg(struct dma_chan
*chan,
struct scatterlist *sgl, unsigned int sg_len,
enum dma_data_direction direction, unsigned long tx_flags)
@@ -1432,8 +1518,7 @@ static void __idmac_terminate_all(struct dma_chan *chan)
struct idmac_tx_desc *desc = ichan->desc + i;
if (list_empty(&desc->list))
/* Descriptor was prepared, but not submitted */
- list_add(&desc->list,
- &ichan->free_list);
+ list_add(&desc->list, &ichan->free_list);
async_tx_clear_ack(&desc->txd);
}
@@ -1476,15 +1561,22 @@ static int idmac_alloc_chan_resources(struct dma_chan
*chan)
goto eimap;
ichan->eof_irq = ret;
- ret = request_irq(ichan->eof_irq, idmac_interrupt, 0,
- ichan->eof_name, ichan);
- if (ret < 0)
- goto erirq;
+
+ /*
+ * Important to first disable the channel, because maybe someone
+ * used it before us, e.g., the bootloader
+ */
+ ipu_disable_channel(idmac, ichan, true);
ret = ipu_init_channel(idmac, ichan);
if (ret < 0)
goto eichan;
+ ret = request_irq(ichan->eof_irq, idmac_interrupt, 0,
+ ichan->eof_name, ichan);
+ if (ret < 0)
+ goto erirq;
+
ichan->status = IPU_CHANNEL_INITIALIZED;
dev_dbg(&ichan->dma_chan.dev->device, "Found channel 0x%x, irq
%d\n",
@@ -1492,9 +1584,9 @@ static int idmac_alloc_chan_resources(struct dma_chan
*chan)
return ret;
-eichan:
- free_irq(ichan->eof_irq, ichan);
erirq:
+ ipu_uninit_channel(idmac, ichan);
+eichan:
ipu_irq_unmap(ichan->dma_chan.chan_id);
eimap:
return ret;
@@ -1600,7 +1692,7 @@ static void ipu_idmac_exit(struct ipu *ipu)
* IPU common probe / remove
*/
-static int ipu_probe(struct platform_device *pdev)
+static int __init ipu_probe(struct platform_device *pdev)
{
struct ipu_platform_data *pdata = pdev->dev.platform_data;
struct resource *mem_ipu, *mem_ic;
--
1.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-28 21:31 ` Agustin
@ 2009-02-28 21:55 ` Guennadi Liakhovetski
2009-03-02 14:50 ` Agustin
0 siblings, 1 reply; 17+ messages in thread
From: Guennadi Liakhovetski @ 2009-02-28 21:55 UTC (permalink / raw)
To: Agustin; +Cc: Linux Arm Kernel, Linux Media Mailing List, Dan Williams
On Sat, 28 Feb 2009, Agustin wrote:
>
> Hi Guennadi,
>
> I am having trouble while probing ipu idmac:
>
> At boot:
> ipu-core: probe of ipu-core failed with error -22
>
> Which is apparently happening at ipu_idmac:1706:
> 1695 static int __init ipu_probe(struct platform_device *pdev)
> ...
> 1703 mem_ipu = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> 1704 mem_ic = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> 1705 if (!pdata || !mem_ipu || !mem_ic)
> 1706 return -EINVAL;
>
> Later on, I get error 16, "Device or resource busy" on VIDIOC_S_FMT, apparently because mx3_camera can't get its dma channel.
>
> Any clue?
Are you sure it is failing here, have you verified with a printk? If it is
indeed this place, then you probably didn't register all required
resources in your platfom code. Look at my platform-bindings patch.
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements
2009-02-28 21:55 ` Guennadi Liakhovetski
@ 2009-03-02 14:50 ` Agustin
0 siblings, 0 replies; 17+ messages in thread
From: Agustin @ 2009-03-02 14:50 UTC (permalink / raw)
To: Guennadi Liakhovetski
Cc: Linux Arm Kernel, Linux Media Mailing List, Dan Williams
--- On 28/2/09, Guennadi Liakhovetski wrote:
> On Sat, 28 Feb 2009, Agustin wrote:
>>
>> Hi Guennadi,
>>
>> I am having trouble while probing ipu idmac:
>>
>> At boot:
>> ipu-core: probe of ipu-core failed with error -22
>>
>> Which is apparently happening at ipu_idmac:1706:
>> 1695 static int __init ipu_probe(struct platform_device *pdev)
>> ...
>> 1703 mem_ipu = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> 1704 mem_ic = platform_get_resource(pdev, IORESOURCE_MEM, 1);
>> 1705 if (!pdata || !mem_ipu || !mem_ic)
>> 1706 return -EINVAL;
>>
>> Later on, I get error 16, "Device or resource busy" on
VIDIOC_S_FMT, apparently because mx3_camera can't get its dma channel.
>>
>> Any clue?
>
>Are you sure it is failing here, have you verified with a printk? If it is
>indeed this place, then you probably didn't register all required
>resources in your platfom code. Look at my platform-bindings patch.
>
>Thanks
>Guennadi
Thanks, I was missing "mx3_ipu_data" struct at devices.c file. It happened because I had git-pulled Valentin's older patch from mxc-master which made your patch fail a few chunks, then the code was very similar when I checked it visually.
Now let's see if I can get back on track with my new hardware design and take those pics...
Regards,
--Agustín.
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/4] soc-camera: camera host driver for i.MX3x SoCs
2009-02-18 0:02 ` [PATCH/RFC 0/4] i.MX31 camera host driver + IPU updates Guennadi Liakhovetski
2009-02-18 0:03 ` [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements Guennadi Liakhovetski
@ 2009-02-18 0:03 ` Guennadi Liakhovetski
2009-02-19 10:57 ` Sascha Hauer
2009-02-18 0:03 ` [PATCH/FYI 3/4] soc-camera: board bindings for " Guennadi Liakhovetski
2009-02-18 0:04 ` [PATCH 4/4] mt9t031: fix gain and hflip controls, register update, and scaling Guennadi Liakhovetski
3 siblings, 1 reply; 17+ messages in thread
From: Guennadi Liakhovetski @ 2009-02-18 0:03 UTC (permalink / raw)
To: Valentin Longchamp
Cc: Agustin, Linux Arm Kernel, Linux Media Mailing List, Sascha Hauer
From: Guennadi Liakhovetski <lg@denx.de>
Tested with 8 bit Bayer and 8 bit monochrome video.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
---
This is how I expect this driver to appear in my pull request. So, please,
review, test heavily:-)
arch/arm/plat-mxc/include/mach/mx3_camera.h | 52 ++
drivers/media/video/Kconfig | 7 +
drivers/media/video/Makefile | 5 +-
drivers/media/video/mx3_camera.c | 1183 +++++++++++++++++++++++++++
4 files changed, 1245 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/plat-mxc/include/mach/mx3_camera.h
create mode 100644 drivers/media/video/mx3_camera.c
diff --git a/arch/arm/plat-mxc/include/mach/mx3_camera.h b/arch/arm/plat-mxc/include/mach/mx3_camera.h
new file mode 100644
index 0000000..36d7ff2
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx3_camera.h
@@ -0,0 +1,52 @@
+/*
+ * mx3_camera.h - i.MX3x camera driver header file
+ *
+ * Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _MX3_CAMERA_H_
+#define _MX3_CAMERA_H_
+
+#include <linux/device.h>
+
+#define MX3_CAMERA_CLK_SRC 1
+#define MX3_CAMERA_EXT_VSYNC 2
+#define MX3_CAMERA_DP 4
+#define MX3_CAMERA_PCP 8
+#define MX3_CAMERA_HSP 0x10
+#define MX3_CAMERA_VSP 0x20
+#define MX3_CAMERA_DATAWIDTH_4 0x40
+#define MX3_CAMERA_DATAWIDTH_8 0x80
+#define MX3_CAMERA_DATAWIDTH_10 0x100
+#define MX3_CAMERA_DATAWIDTH_15 0x200
+
+#define MX3_CAMERA_DATAWIDTH_MASK (MX3_CAMERA_DATAWIDTH_4 | MX3_CAMERA_DATAWIDTH_8 | \
+ MX3_CAMERA_DATAWIDTH_10 | MX3_CAMERA_DATAWIDTH_15)
+
+/**
+ * struct mx3_camera_pdata - i.MX3x camera platform data
+ * @flags: MX3_CAMERA_* flags
+ * @mclk_10khz: master clock frequency in 10kHz units
+ * @dma_dev: IPU DMA device to match against in channel allocation
+ */
+struct mx3_camera_pdata {
+ unsigned long flags;
+ unsigned long mclk_10khz;
+ struct device *dma_dev;
+};
+
+#endif
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 4f3803e..3439c21 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -776,6 +776,13 @@ config VIDEO_SH_MOBILE_CEU
---help---
This is a v4l2 driver for the SuperH Mobile CEU Interface
+config VIDEO_MX3
+ tristate "i.MX3x Camera Sensor Interface driver"
+ depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA
+ select VIDEOBUF_DMA_CONTIG
+ ---help---
+ This is a v4l2 driver for the i.MX3x Camera Sensor Interface
+
#
# USB Multimedia device configuration
#
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 490430e..5ad83e3 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -127,9 +127,10 @@ obj-$(CONFIG_VIDEO_CX18) += cx18/
obj-$(CONFIG_VIDEO_VIVI) += vivi.o
obj-$(CONFIG_VIDEO_CX23885) += cx23885/
-obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o
+obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o
obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o
-obj-$(CONFIG_SOC_CAMERA) += soc_camera.o
+obj-$(CONFIG_VIDEO_MX3) += mx3_camera.o
+obj-$(CONFIG_SOC_CAMERA) += soc_camera.o
obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o
obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o
obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o
diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
new file mode 100644
index 0000000..a925d09
--- /dev/null
+++ b/drivers/media/video/mx3_camera.c
@@ -0,0 +1,1183 @@
+/*
+ * V4L2 Driver for i.MX3x camera host
+ *
+ * Copyright (C) 2008
+ * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/videodev2.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/vmalloc.h>
+#include <linux/interrupt.h>
+
+#include <media/v4l2-common.h>
+#include <media/v4l2-dev.h>
+#include <media/videobuf-dma-contig.h>
+#include <media/soc_camera.h>
+
+#include <mach/ipu.h>
+#include <mach/mx3_camera.h>
+
+#define MX3_CAM_DRV_NAME "mx3-camera"
+
+/* CMOS Sensor Interface Registers */
+#define CSI_REG_START 0x60
+
+#define CSI_SENS_CONF (0x60 - CSI_REG_START)
+#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
+#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
+#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
+#define CSI_TST_CTRL (0x70 - CSI_REG_START)
+#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
+#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
+#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
+#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
+#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
+
+#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
+#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
+#define CSI_SENS_CONF_DATA_POL_SHIFT 2
+#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
+#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
+#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
+#define CSI_SENS_CONF_DATA_FMT_SHIFT 8
+#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
+#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
+#define CSI_SENS_CONF_DIVRATIO_SHIFT 16
+
+#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
+#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
+#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
+
+#define MAX_VIDEO_MEM 16
+
+struct mx3_camera_buffer {
+ /* common v4l buffer stuff -- must be first */
+ struct videobuf_buffer vb;
+ const struct soc_camera_data_format *fmt;
+
+ /* One descriptot per scatterlist (per frame) */
+ struct dma_async_tx_descriptor *txd;
+
+ /* We have to "build" a scatterlist ourselves - one element per frame */
+ struct scatterlist sg;
+};
+
+/**
+ * struct mx3_camera_dev - i.MX3x camera (CSI) object
+ * @dev: camera device, to which the coherent buffer is attached
+ * @icd: currently attached camera sensor
+ * @clk: pointer to clock
+ * @base: remapped register base address
+ * @pdata: platform data
+ * @platform_flags: platform flags
+ * @mclk: master clock frequency in Hz
+ * @capture: list of capture videobuffers
+ * @lock: protects video buffer lists
+ * @active: active video buffer
+ * @idmac_channel: array of pointers to IPU DMAC DMA channels
+ * @soc_host: embedded soc_host object
+ */
+struct mx3_camera_dev {
+ struct device *dev;
+ /*
+ * i.MX3x is only supposed to handle one camera on its Camera Sensor
+ * Interface. If anyone ever builds hardware to enable more than one
+ * camera _simultaneously_, they will have to modify this driver too
+ */
+ struct soc_camera_device *icd;
+ struct clk *clk;
+
+ void __iomem *base;
+
+ struct mx3_camera_pdata *pdata;
+
+ unsigned long platform_flags;
+ unsigned long mclk;
+
+ struct list_head capture;
+ spinlock_t lock; /* Protects video buffer lists */
+ struct mx3_camera_buffer *active;
+
+ /* IDMAC / dmaengine interface */
+ struct idmac_channel *idmac_channel[1]; /* We need one channel */
+
+ struct soc_camera_host soc_host;
+};
+
+struct dma_chan_request {
+ struct mx3_camera_dev *mx3_cam;
+ enum ipu_channel id;
+};
+
+static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
+
+static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
+{
+ return __raw_readl(mx3->base + reg);
+}
+
+static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
+{
+ __raw_writel(value, mx3->base + reg);
+}
+
+/* Called from the IPU IDMAC ISR */
+static void mx3_cam_dma_done(void *arg)
+{
+ struct idmac_tx_desc *desc = to_tx_desc(arg);
+ struct dma_chan *chan = desc->txd.chan;
+ struct idmac_channel *ichannel = to_idmac_chan(chan);
+ struct mx3_camera_dev *mx3_cam = ichannel->client;
+ struct videobuf_buffer *vb;
+
+ dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
+ desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
+
+ spin_lock(&mx3_cam->lock);
+ if (mx3_cam->active) {
+ vb = &mx3_cam->active->vb;
+
+ list_del_init(&vb->queue);
+ vb->state = VIDEOBUF_DONE;
+ do_gettimeofday(&vb->ts);
+ vb->field_count++;
+ wake_up(&vb->done);
+ }
+
+ if (list_empty(&mx3_cam->capture)) {
+ mx3_cam->active = NULL;
+ spin_unlock(&mx3_cam->lock);
+
+ /*
+ * stop capture - without further buffers IPU_CHA_BUF0_RDY will
+ * not get updated
+ */
+ return;
+ }
+
+ mx3_cam->active = list_entry(mx3_cam->capture.next,
+ struct mx3_camera_buffer, vb.queue);
+ mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
+ spin_unlock(&mx3_cam->lock);
+}
+
+static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
+{
+ struct soc_camera_device *icd = vq->priv_data;
+ struct videobuf_buffer *vb = &buf->vb;
+ struct dma_async_tx_descriptor *txd = buf->txd;
+ struct idmac_channel *ichan;
+
+ BUG_ON(in_interrupt());
+
+ dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+ vb, vb->baddr, vb->bsize);
+
+ /*
+ * This waits until this buffer is out of danger, i.e., until it is no
+ * longer in STATE_QUEUED or STATE_ACTIVE
+ */
+ videobuf_waiton(vb, 0, 0);
+ if (txd) {
+ ichan = to_idmac_chan(txd->chan);
+ async_tx_ack(txd);
+ }
+ videobuf_dma_contig_free(vq, vb);
+ buf->txd = NULL;
+
+ vb->state = VIDEOBUF_NEEDS_INIT;
+}
+
+/*
+ * Videobuf operations
+ */
+
+/*
+ * Calculate the __buffer__ (not data) size and number of buffers.
+ * Called with .vb_lock held
+ */
+static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
+ unsigned int *size)
+{
+ struct soc_camera_device *icd = vq->priv_data;
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ /*
+ * bits-per-pixel (depth) as specified in camera's pixel format does
+ * not necessarily match what the camera interface writes to RAM, but
+ * it should be good enough for now.
+ */
+ unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
+
+ if (!mx3_cam->idmac_channel[0])
+ return -EINVAL;
+
+ *size = icd->width * icd->height * bpp;
+
+ if (!*count)
+ *count = 32;
+
+ if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
+ *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
+
+ return 0;
+}
+
+/* Called with .vb_lock held */
+static int mx3_videobuf_prepare(struct videobuf_queue *vq,
+ struct videobuf_buffer *vb, enum v4l2_field field)
+{
+ struct soc_camera_device *icd = vq->priv_data;
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ struct mx3_camera_buffer *buf =
+ container_of(vb, struct mx3_camera_buffer, vb);
+ /* current_fmt _must_ always be set */
+ size_t new_size = icd->width * icd->height *
+ ((icd->current_fmt->depth + 7) >> 3);
+ int ret;
+
+ /*
+ * I think, in buf_prepare you only have to protect global data,
+ * the actual buffer is yours
+ */
+
+ if (buf->fmt != icd->current_fmt ||
+ vb->width != icd->width ||
+ vb->height != icd->height ||
+ vb->field != field) {
+ buf->fmt = icd->current_fmt;
+ vb->width = icd->width;
+ vb->height = icd->height;
+ vb->field = field;
+ if (vb->state != VIDEOBUF_NEEDS_INIT)
+ free_buffer(vq, buf);
+ }
+
+ if (vb->baddr && vb->bsize < new_size) {
+ /* User provided buffer, but it is too small */
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ if (vb->state == VIDEOBUF_NEEDS_INIT) {
+ struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
+ struct scatterlist *sg = &buf->sg;
+
+ /*
+ * The total size of video-buffers that will be allocated / mapped.
+ * *size that we calculated in videobuf_setup gets assigned to
+ * vb->bsize, and now we use the same calculation to get vb->size.
+ */
+ vb->size = new_size;
+
+ /* This actually (allocates and) maps buffers */
+ ret = videobuf_iolock(vq, vb, NULL);
+ if (ret)
+ goto fail;
+
+ /*
+ * We will have to configure the IDMAC channel. It has two slots
+ * for DMA buffers, we shall enter the first two buffers there,
+ * and then submit new buffers in DMA-ready interrupts
+ */
+ sg_init_table(sg, 1);
+ sg_dma_address(sg) = videobuf_to_dma_contig(vb);
+ sg_dma_len(sg) = vb->size;
+
+ buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
+ &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
+ DMA_PREP_INTERRUPT);
+ if (!buf->txd) {
+ ret = -EIO;
+ goto fail;
+ }
+
+ buf->txd->callback_param = buf->txd;
+ buf->txd->callback = mx3_cam_dma_done;
+
+ vb->state = VIDEOBUF_PREPARED;
+ }
+
+ return 0;
+
+fail:
+ free_buffer(vq, buf);
+out:
+ return ret;
+}
+
+static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
+{
+ /* Add more formats as need arises and test possibilities appear... */
+ switch (fourcc) {
+ case V4L2_PIX_FMT_RGB565:
+ return IPU_PIX_FMT_RGB565;
+ case V4L2_PIX_FMT_RGB24:
+ return IPU_PIX_FMT_RGB24;
+ case V4L2_PIX_FMT_RGB332:
+ return IPU_PIX_FMT_RGB332;
+ case V4L2_PIX_FMT_YUV422P:
+ return IPU_PIX_FMT_YVU422P;
+ default:
+ return IPU_PIX_FMT_GENERIC;
+ }
+}
+
+/* Called with .vb_lock held */
+static void mx3_videobuf_queue(struct videobuf_queue *vq,
+ struct videobuf_buffer *vb)
+{
+ struct soc_camera_device *icd = vq->priv_data;
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ struct mx3_camera_buffer *buf =
+ container_of(vb, struct mx3_camera_buffer, vb);
+ struct dma_async_tx_descriptor *txd = buf->txd;
+ struct idmac_channel *ichan = to_idmac_chan(txd->chan);
+ struct idmac_video_param *video = &ichan->params.video;
+ const struct soc_camera_data_format *data_fmt = icd->current_fmt;
+ dma_cookie_t cookie;
+ unsigned long flags;
+
+ /* This is the configuration of one sg-element */
+ video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
+ video->out_width = icd->width;
+ video->out_height = icd->height;
+ video->out_stride = icd->width;
+
+#ifdef DEBUG
+ /* helps to see what DMA actually has written */
+ memset((void *)vb->baddr, 0xaa, vb->bsize);
+#endif
+
+ spin_lock_irqsave(&mx3_cam->lock, flags);
+
+ list_add_tail(&vb->queue, &mx3_cam->capture);
+
+ if (!mx3_cam->active) {
+ mx3_cam->active = buf;
+ vb->state = VIDEOBUF_ACTIVE;
+ } else {
+ vb->state = VIDEOBUF_QUEUED;
+ }
+
+ spin_unlock_irqrestore(&mx3_cam->lock, flags);
+
+ cookie = txd->tx_submit(txd);
+ dev_dbg(&icd->dev, "Submitted cookie %d DMA 0x%08x\n", cookie, sg_dma_address(&buf->sg));
+ if (cookie >= 0)
+ return;
+
+ /* Submit error */
+ vb->state = VIDEOBUF_PREPARED;
+
+ spin_lock_irqsave(&mx3_cam->lock, flags);
+
+ list_del_init(&vb->queue);
+
+ if (mx3_cam->active == buf)
+ mx3_cam->active = NULL;
+
+ spin_unlock_irqrestore(&mx3_cam->lock, flags);
+}
+
+/* Called with .vb_lock held */
+static void mx3_videobuf_release(struct videobuf_queue *vq,
+ struct videobuf_buffer *vb)
+{
+ struct soc_camera_device *icd = vq->priv_data;
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ struct mx3_camera_buffer *buf =
+ container_of(vb, struct mx3_camera_buffer, vb);
+ unsigned long flags;
+
+ dev_dbg(&icd->dev, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
+ mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
+ vb->state, list_empty(&vb->queue) ? "" : "not ");
+ spin_lock_irqsave(&mx3_cam->lock, flags);
+ if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
+ !list_empty(&vb->queue)) {
+ vb->state = VIDEOBUF_ERROR;
+
+ list_del_init(&vb->queue);
+ if (mx3_cam->active == buf)
+ mx3_cam->active = NULL;
+ }
+ spin_unlock_irqrestore(&mx3_cam->lock, flags);
+ free_buffer(vq, buf);
+}
+
+static struct videobuf_queue_ops mx3_videobuf_ops = {
+ .buf_setup = mx3_videobuf_setup,
+ .buf_prepare = mx3_videobuf_prepare,
+ .buf_queue = mx3_videobuf_queue,
+ .buf_release = mx3_videobuf_release,
+};
+
+static void mx3_camera_init_videobuf(struct videobuf_queue *q,
+ struct soc_camera_device *icd)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+
+ videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, mx3_cam->dev,
+ &mx3_cam->lock,
+ V4L2_BUF_TYPE_VIDEO_CAPTURE,
+ V4L2_FIELD_NONE,
+ sizeof(struct mx3_camera_buffer), icd);
+}
+
+/* First part of ipu_csi_init_interface() */
+static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
+ struct soc_camera_device *icd)
+{
+ u32 conf;
+ long rate;
+
+ /* Set default size: ipu_csi_set_window_size() */
+ csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
+ /* ...and position to 0:0: ipu_csi_set_window_pos() */
+ conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
+ csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
+
+ /* We use only gated clock synchronisation mode so far */
+ conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
+
+ /* Set generic data, platform-biggest bus-width */
+ conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
+
+ if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
+ conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
+ conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
+ conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
+ conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+
+ if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
+ conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
+ if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
+ conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
+ if (mx3_cam->platform_flags & MX3_CAMERA_DP)
+ conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
+ if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
+ conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
+ if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
+ conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
+ if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
+ conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
+
+ /* ipu_csi_init_interface() */
+ csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
+
+ clk_enable(mx3_cam->clk);
+ rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
+ dev_dbg(&icd->dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
+ if (rate)
+ clk_set_rate(mx3_cam->clk, rate);
+}
+
+/* Called with .video_lock held */
+static int mx3_camera_add_device(struct soc_camera_device *icd)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ int ret;
+
+ if (mx3_cam->icd) {
+ ret = -EBUSY;
+ goto ebusy;
+ }
+
+ mx3_camera_activate(mx3_cam, icd);
+ ret = icd->ops->init(icd);
+ if (ret < 0) {
+ clk_disable(mx3_cam->clk);
+ goto einit;
+ }
+
+ mx3_cam->icd = icd;
+
+einit:
+ebusy:
+ if (!ret)
+ dev_info(&icd->dev, "MX3 Camera driver attached to camera %d\n",
+ icd->devnum);
+
+ return ret;
+}
+
+/* Called with .video_lock held */
+static void mx3_camera_remove_device(struct soc_camera_device *icd)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
+
+ BUG_ON(icd != mx3_cam->icd);
+
+ if (*ichan) {
+ dma_release_channel(&(*ichan)->dma_chan);
+ *ichan = NULL;
+ }
+
+ icd->ops->release(icd);
+
+ clk_disable(mx3_cam->clk);
+
+ mx3_cam->icd = NULL;
+
+ dev_info(&icd->dev, "MX3 Camera driver detached from camera %d\n",
+ icd->devnum);
+}
+
+static bool channel_change_requested(struct soc_camera_device *icd,
+ const struct soc_camera_format_xlate *xlate,
+ __u32 pixfmt, struct v4l2_rect *rect)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
+
+ /* So far only one configuration is supported */
+ return pixfmt || (ichan && rect->width * rect->height >
+ icd->width * icd->height);
+}
+
+static int test_platform_param(struct mx3_camera_dev *mx3_cam,
+ unsigned char buswidth, unsigned long *flags)
+{
+ /*
+ * Platform specified synchronization and pixel clock polarities are
+ * only a recommendation and are only used during probing. MX3x
+ * camera interface only works in master mode, i.e., uses HSYNC and
+ * VSYNC signals from the sensor
+ */
+ *flags = SOCAM_MASTER |
+ SOCAM_HSYNC_ACTIVE_HIGH |
+ SOCAM_HSYNC_ACTIVE_LOW |
+ SOCAM_VSYNC_ACTIVE_HIGH |
+ SOCAM_VSYNC_ACTIVE_LOW |
+ SOCAM_PCLK_SAMPLE_RISING |
+ SOCAM_PCLK_SAMPLE_FALLING |
+ SOCAM_DATA_ACTIVE_HIGH |
+ SOCAM_DATA_ACTIVE_LOW;
+
+ /* If requested data width is supported by the platform, use it or any
+ * possible lower value - i.MX31 is smart enough to schift bits */
+ switch (buswidth) {
+ case 15:
+ if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
+ return -EINVAL;
+ *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
+ SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
+ break;
+ case 10:
+ if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
+ return -EINVAL;
+ *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
+ SOCAM_DATAWIDTH_4;
+ break;
+ case 8:
+ if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
+ return -EINVAL;
+ *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
+ break;
+ case 4:
+ if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
+ return -EINVAL;
+ *flags |= SOCAM_DATAWIDTH_4;
+ break;
+ default:
+ dev_info(mx3_cam->dev, "Unsupported bus width %d\n", buswidth);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
+ const unsigned int depth)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ unsigned long bus_flags, camera_flags;
+ int ret = test_platform_param(mx3_cam, depth, &bus_flags);
+
+ dev_dbg(&ici->dev, "requested bus width %d bit: %d\n", depth, ret);
+
+ if (ret < 0)
+ return ret;
+
+ camera_flags = icd->ops->query_bus_param(icd);
+
+ ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
+ if (ret < 0)
+ dev_warn(&icd->dev, "Flags incompatible: camera %lx, host %lx\n",
+ camera_flags, bus_flags);
+
+ return ret;
+}
+
+static bool chan_filter(struct dma_chan *chan, void *arg)
+{
+ struct dma_chan_request *rq = arg;
+ struct mx3_camera_pdata *pdata;
+
+ if (!rq)
+ return false;
+
+ pdata = rq->mx3_cam->dev->platform_data;
+
+ return rq->id == chan->chan_id &&
+ pdata->dma_dev == chan->device->dev;
+}
+
+static const struct soc_camera_data_format mx3_camera_formats[] = {
+ {
+ .name = "Bayer (sRGB) 8 bit",
+ .depth = 8,
+ .fourcc = V4L2_PIX_FMT_SBGGR8,
+ .colorspace = V4L2_COLORSPACE_SRGB,
+ }, {
+ .name = "Monochrome 8 bit",
+ .depth = 8,
+ .fourcc = V4L2_PIX_FMT_GREY,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ },
+};
+
+static bool buswidth_supported(struct soc_camera_host *ici, int depth)
+{
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+
+ switch (depth) {
+ case 4:
+ return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
+ case 8:
+ return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
+ case 10:
+ return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
+ case 15:
+ return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
+ }
+ return false;
+}
+
+static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
+ struct soc_camera_format_xlate *xlate)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ int formats = 0, buswidth, ret;
+
+ buswidth = icd->formats[idx].depth;
+
+ if (!buswidth_supported(ici, buswidth))
+ return 0;
+
+ ret = mx3_camera_try_bus_param(icd, buswidth);
+ if (ret < 0)
+ return 0;
+
+ switch (icd->formats[idx].fourcc) {
+ case V4L2_PIX_FMT_SGRBG10:
+ formats++;
+ if (xlate) {
+ xlate->host_fmt = &mx3_camera_formats[0];
+ xlate->cam_fmt = icd->formats + idx;
+ xlate->buswidth = buswidth;
+ xlate++;
+ dev_dbg(&ici->dev, "Providing format %s using %s\n",
+ mx3_camera_formats[0].name,
+ icd->formats[idx].name);
+ }
+ goto passthrough;
+ case V4L2_PIX_FMT_Y16:
+ formats++;
+ if (xlate) {
+ xlate->host_fmt = &mx3_camera_formats[1];
+ xlate->cam_fmt = icd->formats + idx;
+ xlate->buswidth = buswidth;
+ xlate++;
+ dev_dbg(&ici->dev, "Providing format %s using %s\n",
+ mx3_camera_formats[0].name,
+ icd->formats[idx].name);
+ }
+ default:
+passthrough:
+ /* Generic pass-through */
+ formats++;
+ if (xlate) {
+ xlate->host_fmt = icd->formats + idx;
+ xlate->cam_fmt = icd->formats + idx;
+ xlate->buswidth = buswidth;
+ xlate++;
+ dev_dbg(&ici->dev,
+ "Providing format %s in pass-through mode\n",
+ icd->formats[idx].name);
+ }
+ }
+
+ return formats;
+}
+
+static int mx3_camera_set_fmt(struct soc_camera_device *icd,
+ __u32 pixfmt, struct v4l2_rect *rect)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ const struct soc_camera_format_xlate *xlate;
+ u32 ctrl, width_field, height_field;
+ int ret;
+
+ xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
+ if (pixfmt && !xlate) {
+ dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
+ return -EINVAL;
+ }
+
+ /*
+ * We now know pixel formats and can decide upon DMA-channel(s)
+ * So far only direct camera-to-memory is supported
+ */
+ if (channel_change_requested(icd, xlate, pixfmt, rect)) {
+ dma_cap_mask_t mask;
+ struct dma_chan *chan;
+ struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
+ /* We have to use IDMAC_IC_7 for Bayer / generic data */
+ struct dma_chan_request rq = {.mx3_cam = mx3_cam,
+ .id = IDMAC_IC_7};
+
+ if (*ichan) {
+ struct videobuf_buffer *vb, *_vb;
+ dma_release_channel(&(*ichan)->dma_chan);
+ *ichan = NULL;
+ mx3_cam->active = NULL;
+ list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
+ list_del_init(&vb->queue);
+ vb->state = VIDEOBUF_ERROR;
+ wake_up(&vb->done);
+ }
+ }
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+ dma_cap_set(DMA_PRIVATE, mask);
+ chan = dma_request_channel(mask, chan_filter, &rq);
+ if (!chan)
+ return -EBUSY;
+
+ *ichan = to_idmac_chan(chan);
+ (*ichan)->client = mx3_cam;
+ }
+
+ /*
+ * Might have to perform a complete interface initialisation like in
+ * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
+ * mxc_v4l2_s_fmt()
+ */
+
+ /* Setup frame size - this cannot be changed on-the-fly... */
+ width_field = rect->width - 1;
+ height_field = rect->height - 1;
+ csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
+
+ csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
+ csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
+
+ csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
+
+ /* ...and position */
+ ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
+ /* Sensor does the cropping */
+ csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
+
+ /*
+ * No need to free resources here if we fail, we'll see if we need to
+ * do this next time we are called
+ */
+
+ ret = icd->ops->set_fmt(icd, pixfmt ? xlate->cam_fmt->fourcc : 0, rect);
+ if (pixfmt && !ret) {
+ icd->buswidth = xlate->buswidth;
+ icd->current_fmt = xlate->host_fmt;
+ }
+
+ return ret;
+}
+
+static int mx3_camera_try_fmt(struct soc_camera_device *icd,
+ struct v4l2_format *f)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ const struct soc_camera_format_xlate *xlate;
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+ __u32 pixfmt = pix->pixelformat;
+ enum v4l2_field field;
+ int ret;
+
+ xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
+ if (pixfmt && !xlate) {
+ dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
+ return -EINVAL;
+ }
+
+ /* limit to MX3 hardware capabilities */
+ if (pix->height > 4096)
+ pix->height = 4096;
+ if (pix->width > 4096)
+ pix->width = 4096;
+
+ pix->bytesperline = pix->width *
+ DIV_ROUND_UP(xlate->host_fmt->depth, 8);
+ pix->sizeimage = pix->height * pix->bytesperline;
+
+ /* camera has to see its format, but the user the original one */
+ pix->pixelformat = xlate->cam_fmt->fourcc;
+ /* limit to sensor capabilities */
+ ret = icd->ops->try_fmt(icd, f);
+ pix->pixelformat = xlate->host_fmt->fourcc;
+
+ field = pix->field;
+
+ if (field == V4L2_FIELD_ANY) {
+ pix->field = V4L2_FIELD_NONE;
+ } else if (field != V4L2_FIELD_NONE) {
+ dev_err(&icd->dev, "Field type %d unsupported.\n", field);
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+static int mx3_camera_reqbufs(struct soc_camera_file *icf,
+ struct v4l2_requestbuffers *p)
+{
+ return 0;
+}
+
+static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
+{
+ struct soc_camera_file *icf = file->private_data;
+
+ return videobuf_poll_stream(file, &icf->vb_vidq, pt);
+}
+
+static int mx3_camera_querycap(struct soc_camera_host *ici,
+ struct v4l2_capability *cap)
+{
+ /* cap->name is set by the firendly caller:-> */
+ strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
+ cap->version = KERNEL_VERSION(0, 2, 2);
+ cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
+
+ return 0;
+}
+
+static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
+{
+ struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+ struct mx3_camera_dev *mx3_cam = ici->priv;
+ unsigned long bus_flags, camera_flags, common_flags;
+ u32 dw, sens_conf;
+ int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
+ const struct soc_camera_format_xlate *xlate;
+
+ xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
+ if (!xlate) {
+ dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
+ return -EINVAL;
+ }
+
+ dev_dbg(&ici->dev, "requested bus width %d bit: %d\n",
+ icd->buswidth, ret);
+
+ if (ret < 0)
+ return ret;
+
+ camera_flags = icd->ops->query_bus_param(icd);
+
+ common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
+ if (!common_flags) {
+ dev_dbg(&ici->dev, "no common flags: camera %lx, host %lx\n",
+ camera_flags, bus_flags);
+ return -EINVAL;
+ }
+
+ /* Make choices, based on platform preferences */
+ if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
+ (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
+ if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
+ common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
+ else
+ common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
+ }
+
+ if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
+ (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
+ if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
+ common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
+ else
+ common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
+ }
+
+ if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
+ (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
+ if (mx3_cam->platform_flags & MX3_CAMERA_DP)
+ common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
+ else
+ common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
+ }
+
+ if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
+ (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
+ if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
+ common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
+ else
+ common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
+ }
+
+ /* Make the camera work in widest common mode, we'll take care of
+ * the rest */
+ if (common_flags & SOCAM_DATAWIDTH_15)
+ common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
+ SOCAM_DATAWIDTH_15;
+ else if (common_flags & SOCAM_DATAWIDTH_10)
+ common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
+ SOCAM_DATAWIDTH_10;
+ else if (common_flags & SOCAM_DATAWIDTH_8)
+ common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
+ SOCAM_DATAWIDTH_8;
+ else
+ common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
+ SOCAM_DATAWIDTH_4;
+
+ ret = icd->ops->set_bus_param(icd, common_flags);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * So far only gated clock mode is supported. Add a line
+ * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
+ * below and select the required mode when supporting other
+ * synchronisation protocols.
+ */
+ sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
+ ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
+ (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
+ (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
+ (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
+ (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
+ (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
+
+ /* TODO: Support RGB and YUV formats */
+
+ /* This has been set in mx3_camera_activate(), but we clear it above */
+ sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
+
+ if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
+ sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
+ if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
+ sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
+ if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
+ sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
+ if (common_flags & SOCAM_DATA_ACTIVE_LOW)
+ sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
+
+ /* Just do what we're asked to do */
+ switch (xlate->host_fmt->depth) {
+ case 4:
+ dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ break;
+ case 8:
+ dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ break;
+ case 10:
+ dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ break;
+ default:
+ /*
+ * Actually it can only be 15 now, default is just to silence
+ * compiler warnings
+ */
+ case 15:
+ dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
+ }
+
+ csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
+
+ dev_dbg(&ici->dev, "Set SENS_CONF to %x\n", sens_conf | dw);
+
+ return 0;
+}
+
+static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
+ .owner = THIS_MODULE,
+ .add = mx3_camera_add_device,
+ .remove = mx3_camera_remove_device,
+#ifdef CONFIG_PM
+ .suspend = mx3_camera_suspend,
+ .resume = mx3_camera_resume,
+#endif
+ .set_fmt = mx3_camera_set_fmt,
+ .try_fmt = mx3_camera_try_fmt,
+ .get_formats = mx3_camera_get_formats,
+ .init_videobuf = mx3_camera_init_videobuf,
+ .reqbufs = mx3_camera_reqbufs,
+ .poll = mx3_camera_poll,
+ .querycap = mx3_camera_querycap,
+ .set_bus_param = mx3_camera_set_bus_param,
+};
+
+static int mx3_camera_probe(struct platform_device *pdev)
+{
+ struct mx3_camera_dev *mx3_cam;
+ struct resource *res;
+ void __iomem *base;
+ int err = 0;
+ struct soc_camera_host *soc_host;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ err = -ENODEV;
+ goto egetres;
+ }
+
+ mx3_cam = vmalloc(sizeof(*mx3_cam));
+ if (!mx3_cam) {
+ dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
+ err = -ENOMEM;
+ goto ealloc;
+ }
+ memset(mx3_cam, 0, sizeof(*mx3_cam));
+
+ mx3_cam->clk = clk_get(&pdev->dev, "csi_clk");
+ if (IS_ERR(mx3_cam->clk)) {
+ err = PTR_ERR(mx3_cam->clk);
+ goto eclkget;
+ }
+
+ dev_set_drvdata(&pdev->dev, mx3_cam);
+
+ mx3_cam->pdata = pdev->dev.platform_data;
+ mx3_cam->platform_flags = mx3_cam->pdata->flags;
+ if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
+ MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
+ MX3_CAMERA_DATAWIDTH_15))) {
+ /* Platform hasn't set available data widths. This is bad.
+ * Warn and use a default. */
+ dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
+ "data widths, using default 8 bit\n");
+ mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
+ }
+
+ mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
+ if (!mx3_cam->mclk) {
+ dev_warn(&pdev->dev,
+ "mclk_10khz == 0! Please, fix your platform data. "
+ "Using default 20MHz\n");
+ mx3_cam->mclk = 20000000;
+ }
+
+ /* list of video-buffers */
+ INIT_LIST_HEAD(&mx3_cam->capture);
+ spin_lock_init(&mx3_cam->lock);
+
+ base = ioremap(res->start, res->end - res->start + 1);
+ if (!base) {
+ err = -ENOMEM;
+ goto eioremap;
+ }
+
+ mx3_cam->base = base;
+ mx3_cam->dev = &pdev->dev;
+
+ soc_host = &mx3_cam->soc_host;
+ soc_host->drv_name = MX3_CAM_DRV_NAME;
+ soc_host->ops = &mx3_soc_camera_host_ops;
+ soc_host->priv = mx3_cam;
+ soc_host->dev.parent = &pdev->dev;
+ soc_host->nr = pdev->id;
+ err = soc_camera_host_register(soc_host);
+ if (err)
+ goto ecamhostreg;
+
+ /* IDMAC interface */
+ dmaengine_get();
+
+ return 0;
+
+ecamhostreg:
+ iounmap(base);
+eioremap:
+ clk_put(mx3_cam->clk);
+eclkget:
+ vfree(mx3_cam);
+ealloc:
+egetres:
+ return err;
+}
+
+static int __devexit mx3_camera_remove(struct platform_device *pdev)
+{
+ struct mx3_camera_dev *mx3_cam = platform_get_drvdata(pdev);
+
+ clk_put(mx3_cam->clk);
+
+ soc_camera_host_unregister(&mx3_cam->soc_host);
+
+ iounmap(mx3_cam->base);
+
+ /*
+ * The channel has either not been allocated,
+ * or should have been released
+ */
+ if (WARN_ON(mx3_cam->idmac_channel[0]))
+ dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
+
+ vfree(mx3_cam);
+
+ dmaengine_put();
+
+ dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
+
+ return 0;
+}
+
+static struct platform_driver mx3_camera_driver = {
+ .driver = {
+ .name = MX3_CAM_DRV_NAME,
+ },
+ .probe = mx3_camera_probe,
+ .remove = __exit_p(mx3_camera_remove),
+};
+
+
+static int __devinit mx3_camera_init(void)
+{
+ return platform_driver_register(&mx3_camera_driver);
+}
+
+static void __exit mx3_camera_exit(void)
+{
+ platform_driver_unregister(&mx3_camera_driver);
+}
+
+module_init(mx3_camera_init);
+module_exit(mx3_camera_exit);
+
+MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
+MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
+MODULE_LICENSE("GPL v2");
--
1.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 2/4] soc-camera: camera host driver for i.MX3x SoCs
2009-02-18 0:03 ` [PATCH 2/4] soc-camera: camera host driver for i.MX3x SoCs Guennadi Liakhovetski
@ 2009-02-19 10:57 ` Sascha Hauer
0 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2009-02-19 10:57 UTC (permalink / raw)
To: Guennadi Liakhovetski
Cc: Valentin Longchamp, Agustin, Linux Arm Kernel,
Linux Media Mailing List
On Wed, Feb 18, 2009 at 01:03:38AM +0100, Guennadi Liakhovetski wrote:
> From: Guennadi Liakhovetski <lg@denx.de>
>
> Tested with 8 bit Bayer and 8 bit monochrome video.
>
> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
> ---
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
for the platform part. I can't say much to the driver itself.
Sascha
>
> This is how I expect this driver to appear in my pull request. So, please,
> review, test heavily:-)
>
> arch/arm/plat-mxc/include/mach/mx3_camera.h | 52 ++
> drivers/media/video/Kconfig | 7 +
> drivers/media/video/Makefile | 5 +-
> drivers/media/video/mx3_camera.c | 1183 +++++++++++++++++++++++++++
> 4 files changed, 1245 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/plat-mxc/include/mach/mx3_camera.h
> create mode 100644 drivers/media/video/mx3_camera.c
>
> diff --git a/arch/arm/plat-mxc/include/mach/mx3_camera.h b/arch/arm/plat-mxc/include/mach/mx3_camera.h
> new file mode 100644
> index 0000000..36d7ff2
> --- /dev/null
> +++ b/arch/arm/plat-mxc/include/mach/mx3_camera.h
> @@ -0,0 +1,52 @@
> +/*
> + * mx3_camera.h - i.MX3x camera driver header file
> + *
> + * Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#ifndef _MX3_CAMERA_H_
> +#define _MX3_CAMERA_H_
> +
> +#include <linux/device.h>
> +
> +#define MX3_CAMERA_CLK_SRC 1
> +#define MX3_CAMERA_EXT_VSYNC 2
> +#define MX3_CAMERA_DP 4
> +#define MX3_CAMERA_PCP 8
> +#define MX3_CAMERA_HSP 0x10
> +#define MX3_CAMERA_VSP 0x20
> +#define MX3_CAMERA_DATAWIDTH_4 0x40
> +#define MX3_CAMERA_DATAWIDTH_8 0x80
> +#define MX3_CAMERA_DATAWIDTH_10 0x100
> +#define MX3_CAMERA_DATAWIDTH_15 0x200
> +
> +#define MX3_CAMERA_DATAWIDTH_MASK (MX3_CAMERA_DATAWIDTH_4 | MX3_CAMERA_DATAWIDTH_8 | \
> + MX3_CAMERA_DATAWIDTH_10 | MX3_CAMERA_DATAWIDTH_15)
> +
> +/**
> + * struct mx3_camera_pdata - i.MX3x camera platform data
> + * @flags: MX3_CAMERA_* flags
> + * @mclk_10khz: master clock frequency in 10kHz units
> + * @dma_dev: IPU DMA device to match against in channel allocation
> + */
> +struct mx3_camera_pdata {
> + unsigned long flags;
> + unsigned long mclk_10khz;
> + struct device *dma_dev;
> +};
> +
> +#endif
> diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
> index 4f3803e..3439c21 100644
> --- a/drivers/media/video/Kconfig
> +++ b/drivers/media/video/Kconfig
> @@ -776,6 +776,13 @@ config VIDEO_SH_MOBILE_CEU
> ---help---
> This is a v4l2 driver for the SuperH Mobile CEU Interface
>
> +config VIDEO_MX3
> + tristate "i.MX3x Camera Sensor Interface driver"
> + depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA
> + select VIDEOBUF_DMA_CONTIG
> + ---help---
> + This is a v4l2 driver for the i.MX3x Camera Sensor Interface
> +
> #
> # USB Multimedia device configuration
> #
> diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
> index 490430e..5ad83e3 100644
> --- a/drivers/media/video/Makefile
> +++ b/drivers/media/video/Makefile
> @@ -127,9 +127,10 @@ obj-$(CONFIG_VIDEO_CX18) += cx18/
> obj-$(CONFIG_VIDEO_VIVI) += vivi.o
> obj-$(CONFIG_VIDEO_CX23885) += cx23885/
>
> -obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o
> +obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o
> obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o
> -obj-$(CONFIG_SOC_CAMERA) += soc_camera.o
> +obj-$(CONFIG_VIDEO_MX3) += mx3_camera.o
> +obj-$(CONFIG_SOC_CAMERA) += soc_camera.o
> obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o
> obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o
> obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o
> diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> new file mode 100644
> index 0000000..a925d09
> --- /dev/null
> +++ b/drivers/media/video/mx3_camera.c
> @@ -0,0 +1,1183 @@
> +/*
> + * V4L2 Driver for i.MX3x camera host
> + *
> + * Copyright (C) 2008
> + * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/version.h>
> +#include <linux/videodev2.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/vmalloc.h>
> +#include <linux/interrupt.h>
> +
> +#include <media/v4l2-common.h>
> +#include <media/v4l2-dev.h>
> +#include <media/videobuf-dma-contig.h>
> +#include <media/soc_camera.h>
> +
> +#include <mach/ipu.h>
> +#include <mach/mx3_camera.h>
> +
> +#define MX3_CAM_DRV_NAME "mx3-camera"
> +
> +/* CMOS Sensor Interface Registers */
> +#define CSI_REG_START 0x60
> +
> +#define CSI_SENS_CONF (0x60 - CSI_REG_START)
> +#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
> +#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
> +#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
> +#define CSI_TST_CTRL (0x70 - CSI_REG_START)
> +#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
> +#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
> +#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
> +#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
> +#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
> +
> +#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
> +#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
> +#define CSI_SENS_CONF_DATA_POL_SHIFT 2
> +#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
> +#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
> +#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
> +#define CSI_SENS_CONF_DATA_FMT_SHIFT 8
> +#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
> +#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> +#define CSI_SENS_CONF_DIVRATIO_SHIFT 16
> +
> +#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> +#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> +#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> +
> +#define MAX_VIDEO_MEM 16
> +
> +struct mx3_camera_buffer {
> + /* common v4l buffer stuff -- must be first */
> + struct videobuf_buffer vb;
> + const struct soc_camera_data_format *fmt;
> +
> + /* One descriptot per scatterlist (per frame) */
> + struct dma_async_tx_descriptor *txd;
> +
> + /* We have to "build" a scatterlist ourselves - one element per frame */
> + struct scatterlist sg;
> +};
> +
> +/**
> + * struct mx3_camera_dev - i.MX3x camera (CSI) object
> + * @dev: camera device, to which the coherent buffer is attached
> + * @icd: currently attached camera sensor
> + * @clk: pointer to clock
> + * @base: remapped register base address
> + * @pdata: platform data
> + * @platform_flags: platform flags
> + * @mclk: master clock frequency in Hz
> + * @capture: list of capture videobuffers
> + * @lock: protects video buffer lists
> + * @active: active video buffer
> + * @idmac_channel: array of pointers to IPU DMAC DMA channels
> + * @soc_host: embedded soc_host object
> + */
> +struct mx3_camera_dev {
> + struct device *dev;
> + /*
> + * i.MX3x is only supposed to handle one camera on its Camera Sensor
> + * Interface. If anyone ever builds hardware to enable more than one
> + * camera _simultaneously_, they will have to modify this driver too
> + */
> + struct soc_camera_device *icd;
> + struct clk *clk;
> +
> + void __iomem *base;
> +
> + struct mx3_camera_pdata *pdata;
> +
> + unsigned long platform_flags;
> + unsigned long mclk;
> +
> + struct list_head capture;
> + spinlock_t lock; /* Protects video buffer lists */
> + struct mx3_camera_buffer *active;
> +
> + /* IDMAC / dmaengine interface */
> + struct idmac_channel *idmac_channel[1]; /* We need one channel */
> +
> + struct soc_camera_host soc_host;
> +};
> +
> +struct dma_chan_request {
> + struct mx3_camera_dev *mx3_cam;
> + enum ipu_channel id;
> +};
> +
> +static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
> +
> +static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
> +{
> + return __raw_readl(mx3->base + reg);
> +}
> +
> +static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
> +{
> + __raw_writel(value, mx3->base + reg);
> +}
> +
> +/* Called from the IPU IDMAC ISR */
> +static void mx3_cam_dma_done(void *arg)
> +{
> + struct idmac_tx_desc *desc = to_tx_desc(arg);
> + struct dma_chan *chan = desc->txd.chan;
> + struct idmac_channel *ichannel = to_idmac_chan(chan);
> + struct mx3_camera_dev *mx3_cam = ichannel->client;
> + struct videobuf_buffer *vb;
> +
> + dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
> + desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
> +
> + spin_lock(&mx3_cam->lock);
> + if (mx3_cam->active) {
> + vb = &mx3_cam->active->vb;
> +
> + list_del_init(&vb->queue);
> + vb->state = VIDEOBUF_DONE;
> + do_gettimeofday(&vb->ts);
> + vb->field_count++;
> + wake_up(&vb->done);
> + }
> +
> + if (list_empty(&mx3_cam->capture)) {
> + mx3_cam->active = NULL;
> + spin_unlock(&mx3_cam->lock);
> +
> + /*
> + * stop capture - without further buffers IPU_CHA_BUF0_RDY will
> + * not get updated
> + */
> + return;
> + }
> +
> + mx3_cam->active = list_entry(mx3_cam->capture.next,
> + struct mx3_camera_buffer, vb.queue);
> + mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
> + spin_unlock(&mx3_cam->lock);
> +}
> +
> +static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
> +{
> + struct soc_camera_device *icd = vq->priv_data;
> + struct videobuf_buffer *vb = &buf->vb;
> + struct dma_async_tx_descriptor *txd = buf->txd;
> + struct idmac_channel *ichan;
> +
> + BUG_ON(in_interrupt());
> +
> + dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
> + vb, vb->baddr, vb->bsize);
> +
> + /*
> + * This waits until this buffer is out of danger, i.e., until it is no
> + * longer in STATE_QUEUED or STATE_ACTIVE
> + */
> + videobuf_waiton(vb, 0, 0);
> + if (txd) {
> + ichan = to_idmac_chan(txd->chan);
> + async_tx_ack(txd);
> + }
> + videobuf_dma_contig_free(vq, vb);
> + buf->txd = NULL;
> +
> + vb->state = VIDEOBUF_NEEDS_INIT;
> +}
> +
> +/*
> + * Videobuf operations
> + */
> +
> +/*
> + * Calculate the __buffer__ (not data) size and number of buffers.
> + * Called with .vb_lock held
> + */
> +static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
> + unsigned int *size)
> +{
> + struct soc_camera_device *icd = vq->priv_data;
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + /*
> + * bits-per-pixel (depth) as specified in camera's pixel format does
> + * not necessarily match what the camera interface writes to RAM, but
> + * it should be good enough for now.
> + */
> + unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
> +
> + if (!mx3_cam->idmac_channel[0])
> + return -EINVAL;
> +
> + *size = icd->width * icd->height * bpp;
> +
> + if (!*count)
> + *count = 32;
> +
> + if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
> + *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
> +
> + return 0;
> +}
> +
> +/* Called with .vb_lock held */
> +static int mx3_videobuf_prepare(struct videobuf_queue *vq,
> + struct videobuf_buffer *vb, enum v4l2_field field)
> +{
> + struct soc_camera_device *icd = vq->priv_data;
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + struct mx3_camera_buffer *buf =
> + container_of(vb, struct mx3_camera_buffer, vb);
> + /* current_fmt _must_ always be set */
> + size_t new_size = icd->width * icd->height *
> + ((icd->current_fmt->depth + 7) >> 3);
> + int ret;
> +
> + /*
> + * I think, in buf_prepare you only have to protect global data,
> + * the actual buffer is yours
> + */
> +
> + if (buf->fmt != icd->current_fmt ||
> + vb->width != icd->width ||
> + vb->height != icd->height ||
> + vb->field != field) {
> + buf->fmt = icd->current_fmt;
> + vb->width = icd->width;
> + vb->height = icd->height;
> + vb->field = field;
> + if (vb->state != VIDEOBUF_NEEDS_INIT)
> + free_buffer(vq, buf);
> + }
> +
> + if (vb->baddr && vb->bsize < new_size) {
> + /* User provided buffer, but it is too small */
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + if (vb->state == VIDEOBUF_NEEDS_INIT) {
> + struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
> + struct scatterlist *sg = &buf->sg;
> +
> + /*
> + * The total size of video-buffers that will be allocated / mapped.
> + * *size that we calculated in videobuf_setup gets assigned to
> + * vb->bsize, and now we use the same calculation to get vb->size.
> + */
> + vb->size = new_size;
> +
> + /* This actually (allocates and) maps buffers */
> + ret = videobuf_iolock(vq, vb, NULL);
> + if (ret)
> + goto fail;
> +
> + /*
> + * We will have to configure the IDMAC channel. It has two slots
> + * for DMA buffers, we shall enter the first two buffers there,
> + * and then submit new buffers in DMA-ready interrupts
> + */
> + sg_init_table(sg, 1);
> + sg_dma_address(sg) = videobuf_to_dma_contig(vb);
> + sg_dma_len(sg) = vb->size;
> +
> + buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
> + &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
> + DMA_PREP_INTERRUPT);
> + if (!buf->txd) {
> + ret = -EIO;
> + goto fail;
> + }
> +
> + buf->txd->callback_param = buf->txd;
> + buf->txd->callback = mx3_cam_dma_done;
> +
> + vb->state = VIDEOBUF_PREPARED;
> + }
> +
> + return 0;
> +
> +fail:
> + free_buffer(vq, buf);
> +out:
> + return ret;
> +}
> +
> +static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> +{
> + /* Add more formats as need arises and test possibilities appear... */
> + switch (fourcc) {
> + case V4L2_PIX_FMT_RGB565:
> + return IPU_PIX_FMT_RGB565;
> + case V4L2_PIX_FMT_RGB24:
> + return IPU_PIX_FMT_RGB24;
> + case V4L2_PIX_FMT_RGB332:
> + return IPU_PIX_FMT_RGB332;
> + case V4L2_PIX_FMT_YUV422P:
> + return IPU_PIX_FMT_YVU422P;
> + default:
> + return IPU_PIX_FMT_GENERIC;
> + }
> +}
> +
> +/* Called with .vb_lock held */
> +static void mx3_videobuf_queue(struct videobuf_queue *vq,
> + struct videobuf_buffer *vb)
> +{
> + struct soc_camera_device *icd = vq->priv_data;
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + struct mx3_camera_buffer *buf =
> + container_of(vb, struct mx3_camera_buffer, vb);
> + struct dma_async_tx_descriptor *txd = buf->txd;
> + struct idmac_channel *ichan = to_idmac_chan(txd->chan);
> + struct idmac_video_param *video = &ichan->params.video;
> + const struct soc_camera_data_format *data_fmt = icd->current_fmt;
> + dma_cookie_t cookie;
> + unsigned long flags;
> +
> + /* This is the configuration of one sg-element */
> + video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
> + video->out_width = icd->width;
> + video->out_height = icd->height;
> + video->out_stride = icd->width;
> +
> +#ifdef DEBUG
> + /* helps to see what DMA actually has written */
> + memset((void *)vb->baddr, 0xaa, vb->bsize);
> +#endif
> +
> + spin_lock_irqsave(&mx3_cam->lock, flags);
> +
> + list_add_tail(&vb->queue, &mx3_cam->capture);
> +
> + if (!mx3_cam->active) {
> + mx3_cam->active = buf;
> + vb->state = VIDEOBUF_ACTIVE;
> + } else {
> + vb->state = VIDEOBUF_QUEUED;
> + }
> +
> + spin_unlock_irqrestore(&mx3_cam->lock, flags);
> +
> + cookie = txd->tx_submit(txd);
> + dev_dbg(&icd->dev, "Submitted cookie %d DMA 0x%08x\n", cookie, sg_dma_address(&buf->sg));
> + if (cookie >= 0)
> + return;
> +
> + /* Submit error */
> + vb->state = VIDEOBUF_PREPARED;
> +
> + spin_lock_irqsave(&mx3_cam->lock, flags);
> +
> + list_del_init(&vb->queue);
> +
> + if (mx3_cam->active == buf)
> + mx3_cam->active = NULL;
> +
> + spin_unlock_irqrestore(&mx3_cam->lock, flags);
> +}
> +
> +/* Called with .vb_lock held */
> +static void mx3_videobuf_release(struct videobuf_queue *vq,
> + struct videobuf_buffer *vb)
> +{
> + struct soc_camera_device *icd = vq->priv_data;
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + struct mx3_camera_buffer *buf =
> + container_of(vb, struct mx3_camera_buffer, vb);
> + unsigned long flags;
> +
> + dev_dbg(&icd->dev, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
> + mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
> + vb->state, list_empty(&vb->queue) ? "" : "not ");
> + spin_lock_irqsave(&mx3_cam->lock, flags);
> + if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
> + !list_empty(&vb->queue)) {
> + vb->state = VIDEOBUF_ERROR;
> +
> + list_del_init(&vb->queue);
> + if (mx3_cam->active == buf)
> + mx3_cam->active = NULL;
> + }
> + spin_unlock_irqrestore(&mx3_cam->lock, flags);
> + free_buffer(vq, buf);
> +}
> +
> +static struct videobuf_queue_ops mx3_videobuf_ops = {
> + .buf_setup = mx3_videobuf_setup,
> + .buf_prepare = mx3_videobuf_prepare,
> + .buf_queue = mx3_videobuf_queue,
> + .buf_release = mx3_videobuf_release,
> +};
> +
> +static void mx3_camera_init_videobuf(struct videobuf_queue *q,
> + struct soc_camera_device *icd)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> +
> + videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, mx3_cam->dev,
> + &mx3_cam->lock,
> + V4L2_BUF_TYPE_VIDEO_CAPTURE,
> + V4L2_FIELD_NONE,
> + sizeof(struct mx3_camera_buffer), icd);
> +}
> +
> +/* First part of ipu_csi_init_interface() */
> +static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
> + struct soc_camera_device *icd)
> +{
> + u32 conf;
> + long rate;
> +
> + /* Set default size: ipu_csi_set_window_size() */
> + csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
> + /* ...and position to 0:0: ipu_csi_set_window_pos() */
> + conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
> + csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
> +
> + /* We use only gated clock synchronisation mode so far */
> + conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
> +
> + /* Set generic data, platform-biggest bus-width */
> + conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> +
> + if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
> + conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
> + conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
> + conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
> + conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> +
> + if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
> + conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
> + if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
> + conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
> + if (mx3_cam->platform_flags & MX3_CAMERA_DP)
> + conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
> + if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
> + conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
> + if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
> + conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
> + if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
> + conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
> +
> + /* ipu_csi_init_interface() */
> + csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
> +
> + clk_enable(mx3_cam->clk);
> + rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
> + dev_dbg(&icd->dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
> + if (rate)
> + clk_set_rate(mx3_cam->clk, rate);
> +}
> +
> +/* Called with .video_lock held */
> +static int mx3_camera_add_device(struct soc_camera_device *icd)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + int ret;
> +
> + if (mx3_cam->icd) {
> + ret = -EBUSY;
> + goto ebusy;
> + }
> +
> + mx3_camera_activate(mx3_cam, icd);
> + ret = icd->ops->init(icd);
> + if (ret < 0) {
> + clk_disable(mx3_cam->clk);
> + goto einit;
> + }
> +
> + mx3_cam->icd = icd;
> +
> +einit:
> +ebusy:
> + if (!ret)
> + dev_info(&icd->dev, "MX3 Camera driver attached to camera %d\n",
> + icd->devnum);
> +
> + return ret;
> +}
> +
> +/* Called with .video_lock held */
> +static void mx3_camera_remove_device(struct soc_camera_device *icd)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
> +
> + BUG_ON(icd != mx3_cam->icd);
> +
> + if (*ichan) {
> + dma_release_channel(&(*ichan)->dma_chan);
> + *ichan = NULL;
> + }
> +
> + icd->ops->release(icd);
> +
> + clk_disable(mx3_cam->clk);
> +
> + mx3_cam->icd = NULL;
> +
> + dev_info(&icd->dev, "MX3 Camera driver detached from camera %d\n",
> + icd->devnum);
> +}
> +
> +static bool channel_change_requested(struct soc_camera_device *icd,
> + const struct soc_camera_format_xlate *xlate,
> + __u32 pixfmt, struct v4l2_rect *rect)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
> +
> + /* So far only one configuration is supported */
> + return pixfmt || (ichan && rect->width * rect->height >
> + icd->width * icd->height);
> +}
> +
> +static int test_platform_param(struct mx3_camera_dev *mx3_cam,
> + unsigned char buswidth, unsigned long *flags)
> +{
> + /*
> + * Platform specified synchronization and pixel clock polarities are
> + * only a recommendation and are only used during probing. MX3x
> + * camera interface only works in master mode, i.e., uses HSYNC and
> + * VSYNC signals from the sensor
> + */
> + *flags = SOCAM_MASTER |
> + SOCAM_HSYNC_ACTIVE_HIGH |
> + SOCAM_HSYNC_ACTIVE_LOW |
> + SOCAM_VSYNC_ACTIVE_HIGH |
> + SOCAM_VSYNC_ACTIVE_LOW |
> + SOCAM_PCLK_SAMPLE_RISING |
> + SOCAM_PCLK_SAMPLE_FALLING |
> + SOCAM_DATA_ACTIVE_HIGH |
> + SOCAM_DATA_ACTIVE_LOW;
> +
> + /* If requested data width is supported by the platform, use it or any
> + * possible lower value - i.MX31 is smart enough to schift bits */
> + switch (buswidth) {
> + case 15:
> + if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
> + return -EINVAL;
> + *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
> + SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
> + break;
> + case 10:
> + if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
> + return -EINVAL;
> + *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
> + SOCAM_DATAWIDTH_4;
> + break;
> + case 8:
> + if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
> + return -EINVAL;
> + *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
> + break;
> + case 4:
> + if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
> + return -EINVAL;
> + *flags |= SOCAM_DATAWIDTH_4;
> + break;
> + default:
> + dev_info(mx3_cam->dev, "Unsupported bus width %d\n", buswidth);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
> + const unsigned int depth)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + unsigned long bus_flags, camera_flags;
> + int ret = test_platform_param(mx3_cam, depth, &bus_flags);
> +
> + dev_dbg(&ici->dev, "requested bus width %d bit: %d\n", depth, ret);
> +
> + if (ret < 0)
> + return ret;
> +
> + camera_flags = icd->ops->query_bus_param(icd);
> +
> + ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
> + if (ret < 0)
> + dev_warn(&icd->dev, "Flags incompatible: camera %lx, host %lx\n",
> + camera_flags, bus_flags);
> +
> + return ret;
> +}
> +
> +static bool chan_filter(struct dma_chan *chan, void *arg)
> +{
> + struct dma_chan_request *rq = arg;
> + struct mx3_camera_pdata *pdata;
> +
> + if (!rq)
> + return false;
> +
> + pdata = rq->mx3_cam->dev->platform_data;
> +
> + return rq->id == chan->chan_id &&
> + pdata->dma_dev == chan->device->dev;
> +}
> +
> +static const struct soc_camera_data_format mx3_camera_formats[] = {
> + {
> + .name = "Bayer (sRGB) 8 bit",
> + .depth = 8,
> + .fourcc = V4L2_PIX_FMT_SBGGR8,
> + .colorspace = V4L2_COLORSPACE_SRGB,
> + }, {
> + .name = "Monochrome 8 bit",
> + .depth = 8,
> + .fourcc = V4L2_PIX_FMT_GREY,
> + .colorspace = V4L2_COLORSPACE_JPEG,
> + },
> +};
> +
> +static bool buswidth_supported(struct soc_camera_host *ici, int depth)
> +{
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> +
> + switch (depth) {
> + case 4:
> + return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
> + case 8:
> + return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
> + case 10:
> + return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
> + case 15:
> + return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
> + }
> + return false;
> +}
> +
> +static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
> + struct soc_camera_format_xlate *xlate)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + int formats = 0, buswidth, ret;
> +
> + buswidth = icd->formats[idx].depth;
> +
> + if (!buswidth_supported(ici, buswidth))
> + return 0;
> +
> + ret = mx3_camera_try_bus_param(icd, buswidth);
> + if (ret < 0)
> + return 0;
> +
> + switch (icd->formats[idx].fourcc) {
> + case V4L2_PIX_FMT_SGRBG10:
> + formats++;
> + if (xlate) {
> + xlate->host_fmt = &mx3_camera_formats[0];
> + xlate->cam_fmt = icd->formats + idx;
> + xlate->buswidth = buswidth;
> + xlate++;
> + dev_dbg(&ici->dev, "Providing format %s using %s\n",
> + mx3_camera_formats[0].name,
> + icd->formats[idx].name);
> + }
> + goto passthrough;
> + case V4L2_PIX_FMT_Y16:
> + formats++;
> + if (xlate) {
> + xlate->host_fmt = &mx3_camera_formats[1];
> + xlate->cam_fmt = icd->formats + idx;
> + xlate->buswidth = buswidth;
> + xlate++;
> + dev_dbg(&ici->dev, "Providing format %s using %s\n",
> + mx3_camera_formats[0].name,
> + icd->formats[idx].name);
> + }
> + default:
> +passthrough:
> + /* Generic pass-through */
> + formats++;
> + if (xlate) {
> + xlate->host_fmt = icd->formats + idx;
> + xlate->cam_fmt = icd->formats + idx;
> + xlate->buswidth = buswidth;
> + xlate++;
> + dev_dbg(&ici->dev,
> + "Providing format %s in pass-through mode\n",
> + icd->formats[idx].name);
> + }
> + }
> +
> + return formats;
> +}
> +
> +static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> + __u32 pixfmt, struct v4l2_rect *rect)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + const struct soc_camera_format_xlate *xlate;
> + u32 ctrl, width_field, height_field;
> + int ret;
> +
> + xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
> + if (pixfmt && !xlate) {
> + dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
> + return -EINVAL;
> + }
> +
> + /*
> + * We now know pixel formats and can decide upon DMA-channel(s)
> + * So far only direct camera-to-memory is supported
> + */
> + if (channel_change_requested(icd, xlate, pixfmt, rect)) {
> + dma_cap_mask_t mask;
> + struct dma_chan *chan;
> + struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
> + /* We have to use IDMAC_IC_7 for Bayer / generic data */
> + struct dma_chan_request rq = {.mx3_cam = mx3_cam,
> + .id = IDMAC_IC_7};
> +
> + if (*ichan) {
> + struct videobuf_buffer *vb, *_vb;
> + dma_release_channel(&(*ichan)->dma_chan);
> + *ichan = NULL;
> + mx3_cam->active = NULL;
> + list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
> + list_del_init(&vb->queue);
> + vb->state = VIDEOBUF_ERROR;
> + wake_up(&vb->done);
> + }
> + }
> +
> + dma_cap_zero(mask);
> + dma_cap_set(DMA_SLAVE, mask);
> + dma_cap_set(DMA_PRIVATE, mask);
> + chan = dma_request_channel(mask, chan_filter, &rq);
> + if (!chan)
> + return -EBUSY;
> +
> + *ichan = to_idmac_chan(chan);
> + (*ichan)->client = mx3_cam;
> + }
> +
> + /*
> + * Might have to perform a complete interface initialisation like in
> + * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
> + * mxc_v4l2_s_fmt()
> + */
> +
> + /* Setup frame size - this cannot be changed on-the-fly... */
> + width_field = rect->width - 1;
> + height_field = rect->height - 1;
> + csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
> +
> + csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
> + csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
> +
> + csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
> +
> + /* ...and position */
> + ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
> + /* Sensor does the cropping */
> + csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
> +
> + /*
> + * No need to free resources here if we fail, we'll see if we need to
> + * do this next time we are called
> + */
> +
> + ret = icd->ops->set_fmt(icd, pixfmt ? xlate->cam_fmt->fourcc : 0, rect);
> + if (pixfmt && !ret) {
> + icd->buswidth = xlate->buswidth;
> + icd->current_fmt = xlate->host_fmt;
> + }
> +
> + return ret;
> +}
> +
> +static int mx3_camera_try_fmt(struct soc_camera_device *icd,
> + struct v4l2_format *f)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + const struct soc_camera_format_xlate *xlate;
> + struct v4l2_pix_format *pix = &f->fmt.pix;
> + __u32 pixfmt = pix->pixelformat;
> + enum v4l2_field field;
> + int ret;
> +
> + xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
> + if (pixfmt && !xlate) {
> + dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
> + return -EINVAL;
> + }
> +
> + /* limit to MX3 hardware capabilities */
> + if (pix->height > 4096)
> + pix->height = 4096;
> + if (pix->width > 4096)
> + pix->width = 4096;
> +
> + pix->bytesperline = pix->width *
> + DIV_ROUND_UP(xlate->host_fmt->depth, 8);
> + pix->sizeimage = pix->height * pix->bytesperline;
> +
> + /* camera has to see its format, but the user the original one */
> + pix->pixelformat = xlate->cam_fmt->fourcc;
> + /* limit to sensor capabilities */
> + ret = icd->ops->try_fmt(icd, f);
> + pix->pixelformat = xlate->host_fmt->fourcc;
> +
> + field = pix->field;
> +
> + if (field == V4L2_FIELD_ANY) {
> + pix->field = V4L2_FIELD_NONE;
> + } else if (field != V4L2_FIELD_NONE) {
> + dev_err(&icd->dev, "Field type %d unsupported.\n", field);
> + return -EINVAL;
> + }
> +
> + return ret;
> +}
> +
> +static int mx3_camera_reqbufs(struct soc_camera_file *icf,
> + struct v4l2_requestbuffers *p)
> +{
> + return 0;
> +}
> +
> +static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
> +{
> + struct soc_camera_file *icf = file->private_data;
> +
> + return videobuf_poll_stream(file, &icf->vb_vidq, pt);
> +}
> +
> +static int mx3_camera_querycap(struct soc_camera_host *ici,
> + struct v4l2_capability *cap)
> +{
> + /* cap->name is set by the firendly caller:-> */
> + strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
> + cap->version = KERNEL_VERSION(0, 2, 2);
> + cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
> +
> + return 0;
> +}
> +
> +static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> +{
> + struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
> + struct mx3_camera_dev *mx3_cam = ici->priv;
> + unsigned long bus_flags, camera_flags, common_flags;
> + u32 dw, sens_conf;
> + int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
> + const struct soc_camera_format_xlate *xlate;
> +
> + xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
> + if (!xlate) {
> + dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
> + return -EINVAL;
> + }
> +
> + dev_dbg(&ici->dev, "requested bus width %d bit: %d\n",
> + icd->buswidth, ret);
> +
> + if (ret < 0)
> + return ret;
> +
> + camera_flags = icd->ops->query_bus_param(icd);
> +
> + common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
> + if (!common_flags) {
> + dev_dbg(&ici->dev, "no common flags: camera %lx, host %lx\n",
> + camera_flags, bus_flags);
> + return -EINVAL;
> + }
> +
> + /* Make choices, based on platform preferences */
> + if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
> + (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
> + if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
> + common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
> + else
> + common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
> + }
> +
> + if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
> + (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
> + if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
> + common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
> + else
> + common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
> + }
> +
> + if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
> + (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
> + if (mx3_cam->platform_flags & MX3_CAMERA_DP)
> + common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
> + else
> + common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
> + }
> +
> + if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
> + (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
> + if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
> + common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
> + else
> + common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
> + }
> +
> + /* Make the camera work in widest common mode, we'll take care of
> + * the rest */
> + if (common_flags & SOCAM_DATAWIDTH_15)
> + common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
> + SOCAM_DATAWIDTH_15;
> + else if (common_flags & SOCAM_DATAWIDTH_10)
> + common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
> + SOCAM_DATAWIDTH_10;
> + else if (common_flags & SOCAM_DATAWIDTH_8)
> + common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
> + SOCAM_DATAWIDTH_8;
> + else
> + common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
> + SOCAM_DATAWIDTH_4;
> +
> + ret = icd->ops->set_bus_param(icd, common_flags);
> + if (ret < 0)
> + return ret;
> +
> + /*
> + * So far only gated clock mode is supported. Add a line
> + * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
> + * below and select the required mode when supporting other
> + * synchronisation protocols.
> + */
> + sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
> + ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
> + (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
> + (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
> + (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
> + (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> + (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
> +
> + /* TODO: Support RGB and YUV formats */
> +
> + /* This has been set in mx3_camera_activate(), but we clear it above */
> + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> +
> + if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> + sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
> + if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
> + sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
> + if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
> + sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
> + if (common_flags & SOCAM_DATA_ACTIVE_LOW)
> + sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
> +
> + /* Just do what we're asked to do */
> + switch (xlate->host_fmt->depth) {
> + case 4:
> + dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + break;
> + case 8:
> + dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + break;
> + case 10:
> + dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + break;
> + default:
> + /*
> + * Actually it can only be 15 now, default is just to silence
> + * compiler warnings
> + */
> + case 15:
> + dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
> + }
> +
> + csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
> +
> + dev_dbg(&ici->dev, "Set SENS_CONF to %x\n", sens_conf | dw);
> +
> + return 0;
> +}
> +
> +static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
> + .owner = THIS_MODULE,
> + .add = mx3_camera_add_device,
> + .remove = mx3_camera_remove_device,
> +#ifdef CONFIG_PM
> + .suspend = mx3_camera_suspend,
> + .resume = mx3_camera_resume,
> +#endif
> + .set_fmt = mx3_camera_set_fmt,
> + .try_fmt = mx3_camera_try_fmt,
> + .get_formats = mx3_camera_get_formats,
> + .init_videobuf = mx3_camera_init_videobuf,
> + .reqbufs = mx3_camera_reqbufs,
> + .poll = mx3_camera_poll,
> + .querycap = mx3_camera_querycap,
> + .set_bus_param = mx3_camera_set_bus_param,
> +};
> +
> +static int mx3_camera_probe(struct platform_device *pdev)
> +{
> + struct mx3_camera_dev *mx3_cam;
> + struct resource *res;
> + void __iomem *base;
> + int err = 0;
> + struct soc_camera_host *soc_host;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + err = -ENODEV;
> + goto egetres;
> + }
> +
> + mx3_cam = vmalloc(sizeof(*mx3_cam));
> + if (!mx3_cam) {
> + dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
> + err = -ENOMEM;
> + goto ealloc;
> + }
> + memset(mx3_cam, 0, sizeof(*mx3_cam));
> +
> + mx3_cam->clk = clk_get(&pdev->dev, "csi_clk");
> + if (IS_ERR(mx3_cam->clk)) {
> + err = PTR_ERR(mx3_cam->clk);
> + goto eclkget;
> + }
> +
> + dev_set_drvdata(&pdev->dev, mx3_cam);
> +
> + mx3_cam->pdata = pdev->dev.platform_data;
> + mx3_cam->platform_flags = mx3_cam->pdata->flags;
> + if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
> + MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
> + MX3_CAMERA_DATAWIDTH_15))) {
> + /* Platform hasn't set available data widths. This is bad.
> + * Warn and use a default. */
> + dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
> + "data widths, using default 8 bit\n");
> + mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
> + }
> +
> + mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
> + if (!mx3_cam->mclk) {
> + dev_warn(&pdev->dev,
> + "mclk_10khz == 0! Please, fix your platform data. "
> + "Using default 20MHz\n");
> + mx3_cam->mclk = 20000000;
> + }
> +
> + /* list of video-buffers */
> + INIT_LIST_HEAD(&mx3_cam->capture);
> + spin_lock_init(&mx3_cam->lock);
> +
> + base = ioremap(res->start, res->end - res->start + 1);
> + if (!base) {
> + err = -ENOMEM;
> + goto eioremap;
> + }
> +
> + mx3_cam->base = base;
> + mx3_cam->dev = &pdev->dev;
> +
> + soc_host = &mx3_cam->soc_host;
> + soc_host->drv_name = MX3_CAM_DRV_NAME;
> + soc_host->ops = &mx3_soc_camera_host_ops;
> + soc_host->priv = mx3_cam;
> + soc_host->dev.parent = &pdev->dev;
> + soc_host->nr = pdev->id;
> + err = soc_camera_host_register(soc_host);
> + if (err)
> + goto ecamhostreg;
> +
> + /* IDMAC interface */
> + dmaengine_get();
> +
> + return 0;
> +
> +ecamhostreg:
> + iounmap(base);
> +eioremap:
> + clk_put(mx3_cam->clk);
> +eclkget:
> + vfree(mx3_cam);
> +ealloc:
> +egetres:
> + return err;
> +}
> +
> +static int __devexit mx3_camera_remove(struct platform_device *pdev)
> +{
> + struct mx3_camera_dev *mx3_cam = platform_get_drvdata(pdev);
> +
> + clk_put(mx3_cam->clk);
> +
> + soc_camera_host_unregister(&mx3_cam->soc_host);
> +
> + iounmap(mx3_cam->base);
> +
> + /*
> + * The channel has either not been allocated,
> + * or should have been released
> + */
> + if (WARN_ON(mx3_cam->idmac_channel[0]))
> + dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
> +
> + vfree(mx3_cam);
> +
> + dmaengine_put();
> +
> + dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
> +
> + return 0;
> +}
> +
> +static struct platform_driver mx3_camera_driver = {
> + .driver = {
> + .name = MX3_CAM_DRV_NAME,
> + },
> + .probe = mx3_camera_probe,
> + .remove = __exit_p(mx3_camera_remove),
> +};
> +
> +
> +static int __devinit mx3_camera_init(void)
> +{
> + return platform_driver_register(&mx3_camera_driver);
> +}
> +
> +static void __exit mx3_camera_exit(void)
> +{
> + platform_driver_unregister(&mx3_camera_driver);
> +}
> +
> +module_init(mx3_camera_init);
> +module_exit(mx3_camera_exit);
> +
> +MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
> +MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
> +MODULE_LICENSE("GPL v2");
> --
> 1.5.4
>
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH/FYI 3/4] soc-camera: board bindings for camera host driver for i.MX3x SoCs
2009-02-18 0:02 ` [PATCH/RFC 0/4] i.MX31 camera host driver + IPU updates Guennadi Liakhovetski
2009-02-18 0:03 ` [PATCH/RFC 1/4] ipu_idmac: code clean-up and robustness improvements Guennadi Liakhovetski
2009-02-18 0:03 ` [PATCH 2/4] soc-camera: camera host driver for i.MX3x SoCs Guennadi Liakhovetski
@ 2009-02-18 0:03 ` Guennadi Liakhovetski
2009-02-18 0:04 ` [PATCH 4/4] mt9t031: fix gain and hflip controls, register update, and scaling Guennadi Liakhovetski
3 siblings, 0 replies; 17+ messages in thread
From: Guennadi Liakhovetski @ 2009-02-18 0:03 UTC (permalink / raw)
To: Valentin Longchamp
Cc: Agustin, Linux Arm Kernel, Linux Media Mailing List, Sascha Hauer
From: Guennadi Liakhovetski <lg@denx.de>
The driver has been tested on a pcm037 test-board from Phycore. The driver
uses a coherent memory buffer, because although i.MX31 supports video to
scatter-gather lists, it can only pack an integer number of rows in an
sg-buffer, which makes it useless with fixed size sg-elements, and
videobuf-dma-sg.c uses fixed page-sized buffers.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
---
This one will have to be updated for new-style pin-configuration macros,
etc. Just for the ease of testing here.
arch/arm/mach-mx3/devices.c | 56 +++++++++++++++++++++++++++
arch/arm/mach-mx3/pcm037.c | 46 ++++++++++++++++++++++
arch/arm/plat-mxc/include/mach/mx3_camera.h | 2 +
3 files changed, 104 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index 1138a61..e03b127 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -28,6 +28,7 @@
#include <mach/iomux-mx3.h>
#include <mach/ipu.h>
#include <mach/mx3fb.h>
+#include <mach/mx3_camera.h>
static struct resource uart0[] = {
{
@@ -229,6 +230,61 @@ int __init mx3_register_fb(const char *name, const struct fb_videomode *modes,
return platform_device_register(&mx3_fb);
}
+struct mx3_camera_pdata camera_pdata = {
+ .dma_dev = &mx3_ipu.dev,
+};
+
+static struct resource camera_resources[] = {
+ {
+ .start = IPU_CTRL_BASE_ADDR + 0x60,
+ .end = IPU_CTRL_BASE_ADDR + 0x87,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device mx3_camera = {
+ .name = "mx3-camera",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(camera_resources),
+ .resource = camera_resources,
+ .dev = {
+ .platform_data = &camera_pdata,
+ .coherent_dma_mask = DMA_32BIT_MASK,
+ },
+};
+
+int __init mx3_register_camera(size_t buf_size, unsigned long flags,
+ unsigned long mclk_freq_10khz)
+{
+ dma_addr_t dma_handle;
+ void *buf;
+
+ if (!ipu_registered) {
+ int ret = platform_device_register(&mx3_ipu);
+ if (ret < 0)
+ return ret;
+ ipu_registered = true;
+ }
+
+ buf = dma_alloc_coherent(NULL, buf_size, &dma_handle,
+ GFP_KERNEL);
+ if (!buf) {
+ pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ memset(buf, 0, buf_size);
+
+ dma_declare_coherent_memory(&mx3_camera.dev,
+ dma_handle, dma_handle, buf_size,
+ DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
+
+ camera_pdata.flags = flags;
+ camera_pdata.mclk_10khz = mclk_freq_10khz;
+
+ return platform_device_register(&mx3_camera);
+}
+
/* Resource definition for the I2C1 */
static struct resource mxci2c1_resources[] = {
[0] = {
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 12e4d68..4678407 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -42,6 +42,7 @@
#include <mach/iomux-mx3.h>
#include <mach/board-pcm037.h>
#include <mach/mx3fb.h>
+#include <mach/mx3_camera.h>
#include "devices.h"
@@ -132,6 +133,12 @@ static struct i2c_board_info __initdata pcm037_i2c_devices[] = {
},
};
+/*
+ * Try to reserve buffer space enough for 8 buffers 320x240@1 for
+ * streaming plus 2 buffers 2048x1536@1 for still image < 10MB
+ */
+#define PCM037_CAMERA_MEM_SIZE (4 * 1024 * 1024)
+
static struct platform_device *devices[] __initdata = {
&pcm037_flash,
&pcm037_eth,
@@ -163,6 +170,8 @@ static const struct fb_videomode fb_modedb[] = {
*/
static void __init mxc_board_init(void)
{
+ int ret;
+
platform_add_devices(devices, ARRAY_SIZE(devices));
mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
@@ -218,6 +227,43 @@ static void __init mxc_board_init(void)
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC));
mx3_register_fb(fb_modedb[0].name, fb_modedb, ARRAY_SIZE(fb_modedb));
+
+ /* CSI */
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D6, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D7, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D8, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D9, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D10, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D11, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D12, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D13, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D14, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D15, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_HSYNC, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_MCLK, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_PIXCLK, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_VSYNC, IOMUX_CONFIG_FUNC));
+
+ /* ATA power off, disable ATA Buffer, enable CSI buffer */
+ ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D4), "CSI D4");
+ if (!ret) {
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO));
+ gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D4), 0);
+ } else
+ printk(KERN_WARNING "Could not get GPIO %u\n",
+ IOMUX_TO_GPIO(MX31_PIN_CSI_D4));
+
+ ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "CSI D5");
+ if (!ret) {
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO));
+ gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
+ } else
+ printk(KERN_WARNING "Could not get GPIO %u\n",
+ IOMUX_TO_GPIO(MX31_PIN_CSI_D5));
+
+ mx3_register_camera(PCM037_CAMERA_MEM_SIZE,
+ MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
+ 2000);
}
/*
diff --git a/arch/arm/plat-mxc/include/mach/mx3_camera.h b/arch/arm/plat-mxc/include/mach/mx3_camera.h
index 36d7ff2..eddbdc0 100644
--- a/arch/arm/plat-mxc/include/mach/mx3_camera.h
+++ b/arch/arm/plat-mxc/include/mach/mx3_camera.h
@@ -49,4 +49,6 @@ struct mx3_camera_pdata {
struct device *dma_dev;
};
+extern int mx3_register_camera(size_t, unsigned long, unsigned long);
+
#endif
--
1.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 4/4] mt9t031: fix gain and hflip controls, register update, and scaling
2009-02-18 0:02 ` [PATCH/RFC 0/4] i.MX31 camera host driver + IPU updates Guennadi Liakhovetski
` (2 preceding siblings ...)
2009-02-18 0:03 ` [PATCH/FYI 3/4] soc-camera: board bindings for " Guennadi Liakhovetski
@ 2009-02-18 0:04 ` Guennadi Liakhovetski
3 siblings, 0 replies; 17+ messages in thread
From: Guennadi Liakhovetski @ 2009-02-18 0:04 UTC (permalink / raw)
To: Valentin Longchamp; +Cc: Agustin, Linux Media Mailing List
From: Guennadi Liakhovetski <lg@denx.de>
Multiple fixes:
1. allow register update by setting the Output Control register to 2 and not 3
2. fix scaling factor calculations
3. recover lost HFLIP control
4. fix Global Gain calculation
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
---
This one might need an update.
drivers/media/video/mt9t031.c | 127 +++++++++++++++++++++++++++--------------
1 files changed, 84 insertions(+), 43 deletions(-)
diff --git a/drivers/media/video/mt9t031.c b/drivers/media/video/mt9t031.c
index 1a9d539..ffcdd21 100644
--- a/drivers/media/video/mt9t031.c
+++ b/drivers/media/video/mt9t031.c
@@ -150,7 +150,7 @@ static int mt9t031_init(struct soc_camera_device *icd)
if (ret >= 0)
ret = reg_write(icd, MT9T031_RESET, 0);
if (ret >= 0)
- ret = reg_clear(icd, MT9T031_OUTPUT_CONTROL, 3);
+ ret = reg_clear(icd, MT9T031_OUTPUT_CONTROL, 2);
return ret >= 0 ? 0 : -EIO;
}
@@ -158,14 +158,14 @@ static int mt9t031_init(struct soc_camera_device *icd)
static int mt9t031_release(struct soc_camera_device *icd)
{
/* Disable the chip */
- reg_clear(icd, MT9T031_OUTPUT_CONTROL, 3);
+ reg_clear(icd, MT9T031_OUTPUT_CONTROL, 2);
return 0;
}
static int mt9t031_start_capture(struct soc_camera_device *icd)
{
/* Switch to master "normal" mode */
- if (reg_set(icd, MT9T031_OUTPUT_CONTROL, 3) < 0)
+ if (reg_set(icd, MT9T031_OUTPUT_CONTROL, 2) < 0)
return -EIO;
return 0;
}
@@ -173,7 +173,7 @@ static int mt9t031_start_capture(struct soc_camera_device *icd)
static int mt9t031_stop_capture(struct soc_camera_device *icd)
{
/* Stop sensor readout */
- if (reg_clear(icd, MT9T031_OUTPUT_CONTROL, 3) < 0)
+ if (reg_clear(icd, MT9T031_OUTPUT_CONTROL, 2) < 0)
return -EIO;
return 0;
}
@@ -201,6 +201,18 @@ static unsigned long mt9t031_query_bus_param(struct soc_camera_device *icd)
return soc_camera_apply_sensor_flags(icl, MT9T031_BUS_PARAM);
}
+/* Round up minima and round down maxima */
+static void recalculate_limits(struct soc_camera_device *icd,
+ u16 xskip, u16 yskip)
+{
+ icd->x_min = (MT9T031_COLUMN_SKIP + xskip - 1) / xskip;
+ icd->y_min = (MT9T031_ROW_SKIP + yskip - 1) / yskip;
+ icd->width_min = (MT9T031_MIN_WIDTH + xskip - 1) / xskip;
+ icd->height_min = (MT9T031_MIN_HEIGHT + yskip - 1) / yskip;
+ icd->width_max = MT9T031_MAX_WIDTH / xskip;
+ icd->height_max = MT9T031_MAX_HEIGHT / yskip;
+}
+
static int mt9t031_set_fmt(struct soc_camera_device *icd,
__u32 pixfmt, struct v4l2_rect *rect)
{
@@ -208,54 +220,70 @@ static int mt9t031_set_fmt(struct soc_camera_device *icd,
int ret;
const u16 hblank = MT9T031_HORIZONTAL_BLANK,
vblank = MT9T031_VERTICAL_BLANK;
- u16 xbin, xskip = mt9t031->xskip, ybin, yskip = mt9t031->yskip,
- width = rect->width * xskip, height = rect->height * yskip;
+ u16 xbin, xskip, ybin, yskip, width, height, left, top;
if (pixfmt) {
- /* S_FMT - use binning and skipping for scaling, recalculate */
+ /*
+ * try_fmt has put rectangle within limits.
+ * S_FMT - use binning and skipping for scaling, recalculate
+ * limits, used for cropping
+ */
/* Is this more optimal than just a division? */
for (xskip = 8; xskip > 1; xskip--)
- if (rect->width * xskip <= icd->width_max)
+ if (rect->width * xskip <= MT9T031_MAX_WIDTH)
break;
for (yskip = 8; yskip > 1; yskip--)
- if (rect->height * yskip <= icd->height_max)
+ if (rect->height * yskip <= MT9T031_MAX_HEIGHT)
break;
- width = rect->width * xskip;
- height = rect->height * yskip;
-
- dev_dbg(&icd->dev, "xskip %u, width %u, yskip %u, height %u\n",
- xskip, width, yskip, height);
+ recalculate_limits(icd, xskip, yskip);
+ } else {
+ /* CROP - no change in scaling, or in limits */
+ xskip = mt9t031->xskip;
+ yskip = mt9t031->yskip;
}
+ /* Make sure we don't exceed sensor limits */
+ if (rect->left + rect->width > icd->width_max)
+ rect->left = (icd->width_max - rect->width) / 2 + icd->x_min;
+
+ if (rect->top + rect->height > icd->height_max)
+ rect->top = (icd->height_max - rect->height) / 2 + icd->y_min;
+
+ width = rect->width * xskip;
+ height = rect->height * yskip;
+ left = rect->left * xskip;
+ top = rect->top * yskip;
+
xbin = min(xskip, (u16)3);
ybin = min(yskip, (u16)3);
- /* Make sure we don't exceed frame limits */
- if (rect->left + width > icd->width_max)
- rect->left = (icd->width_max - width) / 2;
+ dev_dbg(&icd->dev, "xskip %u, width %u/%u, yskip %u, height %u/%u\n",
+ xskip, width, rect->width, yskip, height, rect->height);
- if (rect->top + height > icd->height_max)
- rect->top = (icd->height_max - height) / 2;
-
- /* Could just do roundup(rect->left, [xy]bin); but this is cheaper */
+ /* Could just do roundup(rect->left, [xy]bin * 2); but this is cheaper */
switch (xbin) {
case 2:
- rect->left = (rect->left + 1) & ~1;
+ left = (left + 3) & ~3;
break;
case 3:
- rect->left = roundup(rect->left, 3);
+ left = roundup(left, 6);
}
switch (ybin) {
case 2:
- rect->top = (rect->top + 1) & ~1;
+ top = (top + 3) & ~3;
break;
case 3:
- rect->top = roundup(rect->top, 3);
+ top = roundup(top, 6);
}
+ /* Disable register update, reconfigure atomically */
+ ret = reg_set(icd, MT9T031_OUTPUT_CONTROL, 1);
+ if (ret < 0)
+ return ret;
+
/* Blanking and start values - default... */
ret = reg_write(icd, MT9T031_HORIZONTAL_BLANKING, hblank);
if (ret >= 0)
@@ -270,14 +298,14 @@ static int mt9t031_set_fmt(struct soc_camera_device *icd,
ret = reg_write(icd, MT9T031_ROW_ADDRESS_MODE,
((ybin - 1) << 4) | (yskip - 1));
}
- dev_dbg(&icd->dev, "new left %u, top %u\n", rect->left, rect->top);
+ dev_dbg(&icd->dev, "new physical left %u, top %u\n", left, top);
/* The caller provides a supported format, as guaranteed by
* icd->try_fmt_cap(), soc_camera_s_crop() and soc_camera_cropcap() */
if (ret >= 0)
- ret = reg_write(icd, MT9T031_COLUMN_START, rect->left);
+ ret = reg_write(icd, MT9T031_COLUMN_START, left);
if (ret >= 0)
- ret = reg_write(icd, MT9T031_ROW_START, rect->top);
+ ret = reg_write(icd, MT9T031_ROW_START, top);
if (ret >= 0)
ret = reg_write(icd, MT9T031_WINDOW_WIDTH, width - 1);
if (ret >= 0)
@@ -302,6 +330,9 @@ static int mt9t031_set_fmt(struct soc_camera_device *icd,
mt9t031->yskip = yskip;
}
+ /* Re-enable register update, commit all changes */
+ reg_clear(icd, MT9T031_OUTPUT_CONTROL, 1);
+
return ret < 0 ? ret : 0;
}
@@ -310,14 +341,14 @@ static int mt9t031_try_fmt(struct soc_camera_device *icd,
{
struct v4l2_pix_format *pix = &f->fmt.pix;
- if (pix->height < icd->height_min)
- pix->height = icd->height_min;
- if (pix->height > icd->height_max)
- pix->height = icd->height_max;
- if (pix->width < icd->width_min)
- pix->width = icd->width_min;
- if (pix->width > icd->width_max)
- pix->width = icd->width_max;
+ if (pix->height < MT9T031_MIN_HEIGHT)
+ pix->height = MT9T031_MIN_HEIGHT;
+ if (pix->height > MT9T031_MAX_HEIGHT)
+ pix->height = MT9T031_MAX_HEIGHT;
+ if (pix->width < MT9T031_MIN_WIDTH)
+ pix->width = MT9T031_MIN_WIDTH;
+ if (pix->width > MT9T031_MAX_WIDTH)
+ pix->width = MT9T031_MAX_WIDTH;
pix->width &= ~0x01; /* has to be even */
pix->height &= ~0x01; /* has to be even */
@@ -390,6 +421,14 @@ static const struct v4l2_queryctrl mt9t031_controls[] = {
.step = 1,
.default_value = 0,
}, {
+ .id = V4L2_CID_HFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Horizontally",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ }, {
.id = V4L2_CID_GAIN,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Gain",
@@ -513,21 +552,23 @@ static int mt9t031_set_control(struct soc_camera_device *icd, struct v4l2_contro
if (data < 0)
return -EIO;
} else {
- /* Pack it into 1.125..15 variable step, register values 9..67 */
+ /* Pack it into 1.125..128 variable step, register values 9..0x7860 */
/* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */
unsigned long range = qctrl->maximum - qctrl->default_value - 1;
+ /* calculated gain: map 65..127 to 9..1024 step 0.125 */
unsigned long gain = ((ctrl->value - qctrl->default_value - 1) *
- 111 + range / 2) / range + 9;
+ 1015 + range / 2) / range + 9;
- if (gain <= 32)
+ if (gain <= 32) /* calculated gain 9..32 -> 9..32 */
data = gain;
- else if (gain <= 64)
+ else if (gain <= 64) /* calculated gain 33..64 -> 0x51..0x60 */
data = ((gain - 32) * 16 + 16) / 32 + 80;
else
- data = ((gain - 64) * 7 + 28) / 56 + 96;
+ /* calculated gain 65..1024 -> (1..120) << 8 + 0x60 */
+ data = (((gain - 64 + 7) * 32) & 0xff00) | 0x60;
- dev_dbg(&icd->dev, "Setting gain from %d to %d\n",
- reg_read(icd, MT9T031_GLOBAL_GAIN), data);
+ dev_dbg(&icd->dev, "Setting gain from 0x%x to 0x%x\n",
+ reg_read(icd, MT9T031_GLOBAL_GAIN), data);
data = reg_write(icd, MT9T031_GLOBAL_GAIN, data);
if (data < 0)
return -EIO;
--
1.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread