From: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
To: rob.clark@oss.qualcomm.com, "Christian König" <christian.koenig@amd.com>
Cc: Oded Gabbay <ogabbay@kernel.org>,
Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Bill Wendling <morbo@google.com>,
Justin Stitt <justinstitt@google.com>,
"Joerg Roedel (AMD)" <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Sumit Semwal <sumit.semwal@linaro.org>,
Bharath Kumar <quic_bkumar@quicinc.com>,
Chenna Kesava Raju <quic_chennak@quicinc.com>,
srinivas.kandagatla@oss.qualcomm.com,
dmitry.baryshkov@oss.qualcomm.com, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org,
linux-arm-msm@vger.kernel.org, llvm@lists.linux.dev,
iommu@lists.linux.dev, linux-media@vger.kernel.org,
linaro-mm-sig@lists.linaro.org
Subject: Re: [PATCH v2 09/15] accel/qda: Add DMA-backed GEM objects and memory manager integration
Date: Wed, 26 Aug 2026 19:15:07 +0530 [thread overview]
Message-ID: <2febead3-0f0c-4e0d-b11a-8c61ec027f44@oss.qualcomm.com> (raw)
In-Reply-To: <CACSVV00MubttbkVJgMommPMorf67yqn7D1kfwpxVUZ0t-6au8Q@mail.gmail.com>
On 24-08-2026 20:37, Rob Clark wrote:
>>> qda_memory_dma.c / qda_memory_dma.h
>>> DMA coherent allocation backend. qda_dma_alloc() calls
>>> dma_alloc_coherent() on the CB device and encodes the stream ID
>>> (SID) in the upper 32 bits of the returned DMA address, following
>>> the Qualcomm FastRPC convention for IOMMU address space tagging.
>>> qda_dma_free() strips the SID prefix before calling
>>> dma_free_coherent().
>>>
>>> qda_memory_manager.c
>>> Adds process-to-device assignment: each DRM file (process) is
>>> assigned one IOMMU context bank device for the lifetime of the
>>> session. qda_memory_manager_assign_device() first checks whether
>>> the process already has a device (reusing it with a refcount
>>> increment), then falls back to claiming an unassigned device.
>>> qda_memory_manager_alloc() and qda_memory_manager_free() delegate
>>> to the DMA backend after resolving the correct CB device for the
>>> calling process.
>> Oh, stuff like that is usually a pretty big NO-GO now.
>>
>> AMD has made the same mistake with KFD and it resulted in a massive chaos.
>>
>> The DRM file is the driver context your process uses and even if there are multiple DRM files for the same PID you should absolute *NOT* share anything between them.
>>
>> The general rule of thumb is to not attach anything to the process using the DRM file descriptor.
> A couple other things to keep in mind:
>
> 1. drm device fd can be passed across processes
> 2. virtgpu/virglrenderer drm native ctx is a single process that opens
> the drm device file N times on behalf of N guest userspace processes.
>
> All that to say, Christian is right here.. drm_file is your context,
> pgtables should be attached to the drm_file (potentially via
> drm_gpuvm.. which you perhaps want to use).
>
> BR,
> -R
>
>> Regards,
>> Christian.
>>
Hi Christian, Rob,
Thank you for highlighting this.
I'll rework the CB assignment to be per-drm_file. Each open() will get a
CB assigned from the available pool (find-first-available, not
find-by-PID). The assigned_pid field and PID-matching logic will be
removed entirely.
The hardware has a limited number of context banks that serve many
sessions (on fastrpc, via the DT "qcom,nsessions" property), so multiple
drm_files may end up sharing the same underlying CB due to hardware
constraints, but while implementing that also, I'll ensure that the
association goes through drm_file->driver_priv, never through a PID scan.
I'll also look into drm_gpuvm for the longer-term address space
management as Rob suggested.
Thanks,
Ekansh
next prev parent reply other threads:[~2026-08-26 13:45 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 4:47 [PATCH v2 00/15] accel/qda: Qualcomm DSP Accelerator driver Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 01/15] MAINTAINERS: Add entry for Qualcomm DSP Accelerator (QDA) driver Ekansh Gupta
2026-08-18 19:22 ` Krzysztof Kozlowski
2026-08-19 13:05 ` Ekansh Gupta
2026-08-19 14:16 ` Krzysztof Kozlowski
2026-08-20 4:12 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 02/15] accel/qda: Add QDA driver documentation Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 03/15] accel/qda: Add initial QDA DRM accelerator driver Ekansh Gupta
2026-08-18 19:10 ` Krzysztof Kozlowski
2026-08-19 13:17 ` Ekansh Gupta
2026-08-19 14:18 ` Krzysztof Kozlowski
2026-08-20 8:52 ` Dmitry Baryshkov
2026-08-20 9:07 ` Krzysztof Kozlowski
2026-08-20 10:07 ` Dmitry Baryshkov
2026-08-20 13:31 ` Krzysztof Kozlowski
2026-08-17 4:47 ` [PATCH v2 04/15] accel/qda: Add compute bus for QDA context banks Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 05/15] iommu: Add QDA compute context bank bus to iommu_buses Ekansh Gupta
2026-08-17 7:01 ` Joerg Roedel (AMD)
2026-08-17 13:44 ` Jason Gunthorpe
2026-08-18 5:10 ` Ekansh Gupta
2026-08-18 13:07 ` Jason Gunthorpe
2026-08-20 13:17 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 06/15] accel/qda: Create compute context bank devices on QDA compute bus Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 07/15] accel/qda: Add memory manager for CB devices Ekansh Gupta
2026-08-17 6:52 ` Dmitry Baryshkov
2026-08-18 4:33 ` Ekansh Gupta
2026-08-18 4:44 ` Dmitry Baryshkov
2026-08-17 4:47 ` [PATCH v2 08/15] accel/qda: Add QUERY IOCTL and QDA UAPI header Ekansh Gupta
2026-08-17 6:58 ` Dmitry Baryshkov
2026-08-18 4:40 ` Ekansh Gupta
2026-08-18 4:45 ` Dmitry Baryshkov
2026-08-17 4:47 ` [PATCH v2 09/15] accel/qda: Add DMA-backed GEM objects and memory manager integration Ekansh Gupta
2026-08-18 3:42 ` Dmitry Baryshkov
2026-08-18 5:51 ` Ekansh Gupta
2026-08-18 3:48 ` Dmitry Baryshkov
2026-08-18 5:52 ` Ekansh Gupta
2026-08-24 14:30 ` Christian König
2026-08-24 15:07 ` Rob Clark
2026-08-25 13:59 ` Christian König
2026-08-26 13:45 ` Ekansh Gupta [this message]
2026-08-26 17:00 ` Markus Elfring
2026-08-17 4:47 ` [PATCH v2 10/15] accel/qda: Add GEM_CREATE and GEM_MMAP_OFFSET IOCTLs Ekansh Gupta
2026-08-18 3:49 ` Dmitry Baryshkov
2026-08-18 5:54 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 11/15] accel/qda: Add PRIME DMA-BUF import support Ekansh Gupta
2026-08-18 3:55 ` Dmitry Baryshkov
2026-08-18 6:25 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 12/15] accel/qda: Add FastRPC invocation support Ekansh Gupta
2026-08-18 4:19 ` Dmitry Baryshkov
2026-08-20 8:35 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 13/15] accel/qda: Add DSP process creation and release Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 14/15] accel/qda: Add remote memory mapping to DSP address space Ekansh Gupta
2026-08-18 19:13 ` [PATCH v2 00/15] accel/qda: Qualcomm DSP Accelerator driver Krzysztof Kozlowski
2026-08-18 19:21 ` Krzysztof Kozlowski
2026-08-19 13:32 ` Ekansh Gupta
2026-08-19 14:19 ` Krzysztof Kozlowski
2026-08-19 13:26 ` Ekansh Gupta
2026-08-19 14:21 ` Krzysztof Kozlowski
2026-08-19 14:38 ` Rob Clark
2026-08-19 14:40 ` Konrad Dybcio
2026-08-19 14:43 ` Krzysztof Kozlowski
2026-08-19 14:49 ` Rob Clark
2026-08-19 14:53 ` Krzysztof Kozlowski
2026-08-19 15:23 ` Rob Clark
2026-08-19 15:27 ` Krzysztof Kozlowski
2026-08-19 15:48 ` Rob Clark
2026-08-20 6:15 ` Krzysztof Kozlowski
2026-08-20 14:47 ` Rob Clark
2026-08-26 13:07 ` Ekansh Gupta
2026-08-18 19:18 ` Krzysztof Kozlowski
2026-08-19 13:23 ` Ekansh Gupta
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