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From: Antti Palosaari <crope@iki.fi>
To: Jose Alberto Reguero <jareguero@telefonica.net>
Cc: Mauro Carvalho Chehab <mchehab@redhat.com>,
	linux-media@vger.kernel.org,
	Michael Krufky <mkrufky@kernellabs.com>,
	Guy Martin <gmsoft@tuxicoman.be>
Subject: Re: [PATCH] add support for the dvb-t part of CT-3650 v3
Date: Wed, 27 Jul 2011 22:22:26 +0300	[thread overview]
Message-ID: <4E306572.3020006@iki.fi> (raw)
In-Reply-To: <201107232345.03173.jareguero@telefonica.net>

On 07/24/2011 12:45 AM, Jose Alberto Reguero wrote:

> Read without write work as with write. Attached updated patch.

> ttusb2-6.diff

> -		read = i+1<  num&&  (msg[i+1].flags&  I2C_M_RD);
> +		write_read = i+1<  num&&  (msg[i+1].flags&  I2C_M_RD);
> +		read = msg[i].flags&  I2C_M_RD;

ttusb2 I2C-adapter seems to be fine for my eyes now. No more writing any 
random bytes in case of single read. Good!


> +	.dtv6_if_freq_khz = TDA10048_IF_4000,
> +	.dtv7_if_freq_khz = TDA10048_IF_4500,
> +	.dtv8_if_freq_khz = TDA10048_IF_5000,
> +	.clk_freq_khz     = TDA10048_CLK_16000,


> +static int ct3650_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)

cosmetic issue rename to ttusb2_ct3650_i2c_gate_ctrl



>   	{ TDA10048_CLK_16000, TDA10048_IF_4000,  10, 3, 0 },
> +	{ TDA10048_CLK_16000, TDA10048_IF_4500,   5, 3, 0 },
> +	{ TDA10048_CLK_16000, TDA10048_IF_5000,   5, 3, 0 },

> +	/* Set the  pll registers */
> +	tda10048_writereg(state, TDA10048_CONF_PLL1, 0x0f);
> +	tda10048_writereg(state, TDA10048_CONF_PLL2, (u8)(state->pll_mfactor));
> +	tda10048_writereg(state, TDA10048_CONF_PLL3, tda10048_readreg(state, TDA10048_CONF_PLL3) | ((u8)(state->pll_nfactor) | 0x40));

This if only issue can have effect to functionality and I want double 
check. I see few things.

1) clock (and PLL) settings should be done generally only once at 
.init() and probably .sleep() in case of needed for sleep. Something 
like start clock in init, stop clock in sleep. It is usually very first 
thing to set before other. Now it is in wrong place - .set_frontend().

2) Those clock settings seem somehow weird. As you set different PLL M 
divider for 6 MHz bandwidth than others. Have you looked those are 
really correct? I suspect there could be some other Xtal than 16MHz and 
thus those are wrong. Which Xtals there is inside device used? There is 
most likely 3 Xtals, one for each chip. It is metal box nearest to chip.


Ran checkpatch.pl also to find out style issues before send patch.

I have send new version, hopefully final, of MFE. It changes array name 
from adap->mfe to adap-fe. You should also update that.


regards
Antti

-- 
http://palosaari.fi/

  reply	other threads:[~2011-07-27 19:22 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <201106070205.08118.jareguero@telefonica.net>
     [not found] ` <201107070057.06317.jareguero@telefonica.net>
2011-07-13 12:41   ` [PATCH] add support for the dvb-t part of CT-3650 v2 Mauro Carvalho Chehab
2011-07-14 20:00     ` [PATCH] add support for the dvb-t part of CT-3650 v3 Jose Alberto Reguero
2011-07-18 20:28       ` Antti Palosaari
2011-07-18 21:31         ` Michael Krufky
     [not found]         ` <201107190100.16802.jareguero@telefonica.net>
2011-07-18 23:44           ` Antti Palosaari
2011-07-19  8:25             ` Jose Alberto Reguero
2011-07-19 23:07               ` Antti Palosaari
2011-07-22 11:32                 ` Antti Palosaari
2011-07-22 16:02                   ` Jose Alberto Reguero
2011-07-22 16:08                     ` Antti Palosaari
2011-07-22 16:25                       ` Jose Alberto Reguero
2011-07-22 16:46                         ` Antti Palosaari
     [not found]                           ` <201107222012.20711.jareguero@telefonica.net>
2011-07-22 21:49                             ` Jose Alberto Reguero
2011-07-22 22:23                               ` Antti Palosaari
2011-07-23  8:26                                 ` Jose Alberto Reguero
2011-07-23  9:42                                   ` Antti Palosaari
2011-07-23 10:21                                     ` Jose Alberto Reguero
2011-07-23 10:37                                       ` Antti Palosaari
2011-07-23 15:41                                         ` Jose Alberto Reguero
2011-07-23 17:47                                           ` Antti Palosaari
2011-07-23 21:45                                             ` Jose Alberto Reguero
2011-07-27 19:22                                               ` Antti Palosaari [this message]
2011-07-28 19:25                                                 ` Jose Alberto Reguero
2011-08-02 19:21                                                   ` Jose Alberto Reguero
2011-08-08 10:35                                                     ` Jose Alberto Reguero
2011-08-08 21:44                                                       ` Antti Palosaari
2011-08-09 19:45                                                         ` Jose Alberto Reguero
2011-07-16 11:38     ` [PATCH] improve recection with limits frecuenies and tda827x Jose Alberto Reguero

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