From: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Robert Foss <rfoss@kernel.org>, Todor Tomov <todor.too@gmail.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Bryan O'Donoghue <bod@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org,
Krzysztof Kozlowski <krzk@kernel.org>,
Christopher Obbard <christopher.obbard@linaro.org>
Subject: Re: [PATCH v11 2/7] dt-bindings: media: qcom,x1e80100-camss: Add support for combo-mode endpoints
Date: Thu, 26 Mar 2026 02:08:21 +0000 [thread overview]
Message-ID: <540c2a97-00ec-4358-855a-b238aab53860@linaro.org> (raw)
In-Reply-To: <17ab70a4-1ab8-4384-8537-44dbfe31889a@linaro.org>
On 26/03/2026 01:51, Vladimir Zapolskiy wrote:
> On 3/26/26 03:28, Bryan O'Donoghue wrote:
>> Qualcomm CSI2 PHYs support a mode where two sensors may be attached to
>> the
>> one CSIPHY.
>>
>> When we have one endpoint we may have
>> - DPHY 1, 2 or 4 data lanes + 1 clock lane
>> - CPHY 3 wire data lane
>>
>> When we have two endpoints this indicates the special fixed combo-mode.
>> - DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane
>> combination.
>>
>> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
>> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>> ---
>> .../bindings/media/qcom,x1e80100-camss.yaml | 69 ++++++++++++
>> ++++++++--
>> 1 file changed, 65 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-
>> camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-
>> camss.yaml
>> index c17b9757b2c86..f44138f522bba 100644
>> --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
>> +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
>> @@ -148,7 +148,8 @@ properties:
>> $ref: /schemas/graph.yaml#/properties/ports
>> description:
>> - CSI input ports.
>> + CSI input ports. Supports either standard single sensor mode or
>> + Qualcomm's combo mode with one sensor in 2x1 + 1x1 data-lane,
>> clock-lane mode.
>> patternProperties:
>> "^port@[0-3]$":
>> @@ -156,26 +157,86 @@ properties:
>> unevaluatedProperties: false
>> description:
>> - Input port for receiving CSI data from a CSIPHY.
>> + Input port for receiving CSI data.
>> properties:
>> - endpoint:
>> + endpoint@0:
>> $ref: video-interfaces.yaml#
>> unevaluatedProperties: false
>> + description:
>> + Endpoint for receiving a single sensor input (or first
>> leg of combo).
>> +
>> properties:
>> data-lanes:
>> minItems: 1
>> - maxItems: 4
>> + maxItems: 4 # Base max allows 4 (for D-PHY)
>> +
>> + clock-lanes:
>> + maxItems: 1
>> bus-type:
>> enum:
>> - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
>> - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
>> + endpoint@1:
>> + $ref: video-interfaces.yaml#
>> + unevaluatedProperties: false
>> +
>> + description:
>> + Endpoint for receiving the second leg of a combo sensor
>> input.
>> +
>> + properties:
>> + data-lanes:
>> + maxItems: 1
>> +
>> + clock-lanes:
>> + maxItems: 1
>> +
>> + bus-type:
>> + const: 4 # Combo is D-PHY specific
>> +
>
> It's unclear why both 'bus-type' and 'phys' cell argument are needed
> at the same time, they are equal and thus one of two is redundant.
>
bus-type lives on the CAMSS controller endpoint. It tells the V4L2
fwnode parser (v4l2_fwnode_endpoint_parse) how to interpret the endpoint
properties — DPHY has data-lanes + clock-lanes, CPHY has trios.
PHY phandle cell lives on the phys reference. It tells the PHY driver
which electrical mode to configure
---
bod
next prev parent reply other threads:[~2026-03-26 2:07 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-26 1:28 [PATCH v11 0/7] Add dt-bindings and PHY updates for CAMSS on x1e80100 silicon Bryan O'Donoghue
2026-03-26 1:28 ` [PATCH v11 1/7] dt-bindings: media: qcom,x1e80100-camss: Add optional PHY handle definitions Bryan O'Donoghue
2026-03-26 2:46 ` Rob Herring (Arm)
2026-03-26 7:33 ` Krzysztof Kozlowski
2026-03-26 7:34 ` Krzysztof Kozlowski
2026-03-26 1:28 ` [PATCH v11 2/7] dt-bindings: media: qcom,x1e80100-camss: Add support for combo-mode endpoints Bryan O'Donoghue
2026-03-26 1:51 ` Vladimir Zapolskiy
2026-03-26 2:08 ` Bryan O'Donoghue [this message]
2026-03-26 1:28 ` [PATCH v11 3/7] dt-bindings: media: qcom,x1e80100-camss: Describe iommu entries Bryan O'Donoghue
2026-03-26 1:28 ` [PATCH v11 4/7] media: qcom: camss: Add support to populate sub-devices Bryan O'Donoghue
2026-03-26 1:28 ` [PATCH v11 5/7] media: qcom: camss: Add legacy_phy flag to SoC definition structures Bryan O'Donoghue
2026-03-26 1:28 ` [PATCH v11 6/7] media: qcom: camss: Add support for PHY API devices Bryan O'Donoghue
2026-03-26 1:28 ` [PATCH v11 7/7] media: qcom: camss: Drop legacy PHY descriptions from x1e Bryan O'Donoghue
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