From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-wm0-f46.google.com ([74.125.82.46]:38502 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750965AbbK0MV3 (ORCPT ); Fri, 27 Nov 2015 07:21:29 -0500 Received: by wmec201 with SMTP id c201so56351892wme.1 for ; Fri, 27 Nov 2015 04:21:27 -0800 (PST) Subject: Re: [RESEND RFC/PATCH 3/8] media: platform: mtk-vpu: Support Mediatek VPU To: andrew-ct chen References: <1447764885-23100-1-git-send-email-tiffany.lin@mediatek.com> <1447764885-23100-4-git-send-email-tiffany.lin@mediatek.com> <5655DDB4.2080002@linaro.org> <1448626209.7734.26.camel@mtksdaap41> Cc: Tiffany Lin , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Mauro Carvalho Chehab , Matthias Brugger , Daniel Kurtz , Sascha Hauer , Hongzhou Yang , Hans Verkuil , Laurent Pinchart , Sakari Ailus , Geert Uytterhoeven , Mikhail Ulyanov , Fabien Dessenne , Arnd Bergmann , Darren Etheridge , Peter Griffin , Benoit Parrot , Eddie Huang , Yingjoe Chen , James Liao , Daniel Hsiao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org From: Daniel Thompson Message-ID: <56584AC5.7020704@linaro.org> Date: Fri, 27 Nov 2015 12:21:25 +0000 MIME-Version: 1.0 In-Reply-To: <1448626209.7734.26.camel@mtksdaap41> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-media-owner@vger.kernel.org List-ID: On 27/11/15 12:10, andrew-ct chen wrote: >>> + >>> > >+ memcpy((void *)send_obj->share_buf, buf, len); >>> > >+ send_obj->len = len; >>> > >+ send_obj->id = id; >>> > >+ vpu_cfg_writel(vpu, 0x1, HOST_TO_VPU); >>> > >+ >>> > >+ /* Wait until VPU receives the command */ >>> > >+ timeout = jiffies + msecs_to_jiffies(IPI_TIMEOUT_MS); >>> > >+ do { >>> > >+ if (time_after(jiffies, timeout)) { >>> > >+ dev_err(vpu->dev, "vpu_ipi_send: IPI timeout!\n"); >>> > >+ return -EIO; >>> > >+ } >>> > >+ } while (vpu_cfg_readl(vpu, HOST_TO_VPU)); >> > >> >Do we need to busy wait every time we communicate with the co-processor? >> >Couldn't we put this wait*before* we write to HOST_TO_VPU above. >> > >> >That way we only spin when there is a need to. >> > > Since the hardware VPU only allows that one client sends the command to > it each time. > We need the wait to make sure VPU accepted the command and cleared the > interrupt and then the next command would be served. I understand that the VPU can only have on message outstanding at once. I just wonder why we busy wait *after* sending the first command rather than *before* sending the second one. Streamed decode/encode typically ends up being rate controlled by capture or display meaning that in these cases we don't need to busy wait at all (because by the time we send the next frame the VPU has already accepted the previous message). Daniel.