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Wed, 30 Sep 2026 19:49:28 -0700 (PDT) X-Received: by 2002:a05:7022:ea8b:b0:14b:588b:c80f with SMTP id a92af1059eb24-14d31a8191fmr2935611c88.10.1790822967664; Wed, 30 Sep 2026 19:49:27 -0700 (PDT) Received: from [192.168.0.12] ([183.83.137.244]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-34db3758da2sm2892431eec.15.2026.09.30.19.49.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Sep 2026 19:49:27 -0700 (PDT) Message-ID: <6846a877-5698-e38d-41fd-95cb8c0986c1@oss.qualcomm.com> Date: Thu, 1 Oct 2026 08:19:20 +0530 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v8 3/5] media: iris: Add ROI delta QP control support for HFI Gen2 encoders Content-Language: en-US To: Deepa Guthyappa Madivalara , Mauro Carvalho Chehab , Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel test robot References: <20260930-enc_roi_enable-v8-0-2c908f30e963@oss.qualcomm.com> <20260930-enc_roi_enable-v8-3-2c908f30e963@oss.qualcomm.com> From: Vishnu Reddy In-Reply-To: <20260930-enc_roi_enable-v8-3-2c908f30e963@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDAxMDAxMSBTYWx0ZWRfX1dcWlRCfWrVj ebQ94Rm8416YLlelnWIwNmt+GcNb5qnfQsoqUthGkO9ZHLAqDezHkD+RQlhmjsoRrzjhnaWGHuu CaDJCghrl3zYlBMIljvAg34ftp2+uqH/5GJko36uoQMuvE7+wAVZFSUQ9u/aJWoi8xWxG9YB9mA L6vaQ9qJMo2mjBrU01UvwnkdtTVtnblXTq12s3Ngn+38XCCl7jUdHT1On0iksOHwImDwPl5tW/Q BNkV9MEyhezB7wSwRWa+gVP+lz44vMM4XVPeJlWvPZGWX13sjqtJCPD+5v+RCxeAyv0wshOC/jS Ajm8J4787FGFyahOtZ18thlWEcMWbaj7pW4MA+5MsTS7tmz+kY/3GpKR0PsuCdlIboGfN8UvwZW ezxxcUgLmSuKWq2tt5qLgQ2PrHxkH18l3rXrp/9dSLVUXrcVA+a+A/WRDnIR/0tbygcbnIi8Y3e c8gC7pzoVSN09IOaFow== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDAxMDAxMSBTYWx0ZWRfX99LpDxaDHE3M EvsvPMN/uUNg/wEkGYEDtnxuGPDzvgY/F6VKsEObmwZn2ArH7EP+oSvg2lBW+TrfIwWYh/Eor6x j2teH4Xv4tdMVG8lbfNfDz0qBBcvQG0= X-Proofpoint-ORIG-GUID: td1f4Vz14lk68yZxRi9gd2FMZawegdxR X-Proofpoint-GUID: td1f4Vz14lk68yZxRi9gd2FMZawegdxR X-Authority-Analysis: v=2.4 cv=NrJE4MdJ c=1 sm=1 tr=0 ts=6abdca39 cx=c_pps a=JYo30EpNSr/tUYqK9jHPoA==:117 a=gJrurTm18R8X9NiJySVakQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=BQAKiL45JnMOSjkhOBIA:9 a=QEXdDO2ut3YA:10 a=Fk4IpSoW4aLDllm1B1p-:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-01_01,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610010011 On 10/1/2026 12:00 AM, Deepa Guthyappa Madivalara wrote: > Add ROI support to the Iris encoder driver for HFI Gen2 based targets. > > - Add control infrastructure, ROI_PARAMS and MB_SIZE capability IDs to > platform_inst_fw_cap_type. Extend struct platform_inst_fw_cap with > p_array and elems fields to hold a pointer to the per-frame > delta QP array and its element count, set during s_ctrl. > - Register V4L2_CID_MPEG_VIDEO_ROI_MB_DELTA_QP as a dynamic S8 > array control (max dims = 139264 entries, supporting resolution of > 8192x4352 at 16x16 MB granularity). > Register V4L2_CID_MPEG_VIDEO_ROI_MB_SIZE as a read-only U8 > control; g_volatile_ctrl returns 32 for HEVC and 16 for H.264. > - Define HFI_PROP_ROI_INFO and hook ROI_PARAMS to iris_set_roi_params(). > > Signed-off-by: Deepa Guthyappa Madivalara > --- > drivers/media/platform/qcom/iris/iris_ctrls.c | 70 +++++++++++++++++++++- > drivers/media/platform/qcom/iris/iris_hfi_gen2.c | 13 ++++ > .../platform/qcom/iris/iris_hfi_gen2_defines.h | 1 + > .../platform/qcom/iris/iris_platform_common.h | 5 ++ > 4 files changed, 88 insertions(+), 1 deletion(-) > > diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/platform/qcom/iris/iris_ctrls.c > index bf17d310eac081ffd3a4ad4842c2255ad798d4d8..9f84d28d00ab25555f1d2259f7ef0ed0786a0271 100644 > --- a/drivers/media/platform/qcom/iris/iris_ctrls.c > +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c > @@ -156,6 +156,10 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(u32 id) > return LAYER5_BITRATE_HEVC; > case V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME: > return REQUEST_SYNC_FRAME; > + case V4L2_CID_MPEG_VIDEO_ROI_MB_DELTA_QP: > + return ROI_PARAMS; > + case V4L2_CID_MPEG_VIDEO_ROI_MB_SIZE: > + return MB_SIZE; > default: > return INST_FW_CAP_MAX; > } > @@ -301,6 +305,10 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_type cap_id) > return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR; > case REQUEST_SYNC_FRAME: > return V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME; > + case ROI_PARAMS: > + return V4L2_CID_MPEG_VIDEO_ROI_MB_DELTA_QP; > + case MB_SIZE: > + return V4L2_CID_MPEG_VIDEO_ROI_MB_SIZE; > default: > return 0; > } > @@ -327,6 +335,14 @@ static int iris_op_s_ctrl(struct v4l2_ctrl *ctrl) > > inst->fw_caps[cap_id].value = ctrl->val; > > + if (inst->fw_caps[cap_id].flags & CAP_FLAG_CUSTOM) { > + if (cap_id == ROI_PARAMS) { > + inst->fw_caps[cap_id].p_array = > + (const void *)ctrl->p_new.p; > + inst->fw_caps[cap_id].elems = ctrl->new_elems; > + } > + } > + > if (vb2_is_streaming(q)) { > if (cap[cap_id].set) > cap[cap_id].set(inst, cap_id); > @@ -335,8 +351,53 @@ static int iris_op_s_ctrl(struct v4l2_ctrl *ctrl) > return 0; > } > > +static int iris_get_roi_mb_size(struct iris_inst *inst) > +{ > + return inst->codec == V4L2_PIX_FMT_HEVC ? 32 : 16; > +} > + > +static int iris_op_g_ctrl(struct v4l2_ctrl *ctrl) > +{ > + struct iris_inst *inst = container_of(ctrl->handler, struct iris_inst, ctrl_handler); > + enum platform_inst_fw_cap_type cap_id; > + > + cap_id = iris_get_cap_id(ctrl->id); > + if (!iris_valid_cap_id(cap_id)) > + return -EINVAL; > + > + if (cap_id == MB_SIZE) > + ctrl->val = iris_get_roi_mb_size(inst); > + > + return 0; > +} > + > static const struct v4l2_ctrl_ops iris_ctrl_ops = { > .s_ctrl = iris_op_s_ctrl, > + .g_volatile_ctrl = iris_op_g_ctrl, > +}; > + > +static const struct v4l2_ctrl_config roi_mbqp_cfg = { > + .ops = &iris_ctrl_ops, > + .id = V4L2_CID_MPEG_VIDEO_ROI_MB_DELTA_QP, > + .name = "Enc Mb ROI Delta QP", > + .type = V4L2_CTRL_TYPE_S8, > + .dims = {139264}, /* Max MBPF = 8192 * 4352 / 256 */ > + .min = -31, > + .max = 30, > + .def = 0, > + .step = 1, > + .flags = V4L2_CTRL_FLAG_DYNAMIC_ARRAY, > +}; > + > +static const struct v4l2_ctrl_config roi_mbqp_size = { > + .ops = &iris_ctrl_ops, > + .id = V4L2_CID_MPEG_VIDEO_ROI_MB_SIZE, > + .name = "ROI Mb size", > + .type = V4L2_CTRL_TYPE_U8, > + .min = 16, > + .max = 32, > + .def = 16, > + .step = 1, > }; > > int iris_ctrls_init(struct iris_inst *inst) > @@ -361,7 +422,7 @@ int iris_ctrls_init(struct iris_inst *inst) > return ret; > > for (idx = 1; idx < INST_FW_CAP_MAX; idx++) { > - struct v4l2_ctrl *ctrl; > + struct v4l2_ctrl *ctrl = NULL; > > v4l2_id = iris_get_v4l2_id(cap[idx].cap_id); > if (!v4l2_id) > @@ -379,6 +440,13 @@ int iris_ctrls_init(struct iris_inst *inst) > cap[idx].max, > ~(cap[idx].step_or_mask), > cap[idx].value); > + } else if (cap[idx].flags & CAP_FLAG_CUSTOM) { > + if (cap[idx].cap_id == ROI_PARAMS) > + ctrl = v4l2_ctrl_new_custom(&inst->ctrl_handler, > + &roi_mbqp_cfg, NULL); > + if (cap[idx].cap_id == MB_SIZE) > + ctrl = v4l2_ctrl_new_custom(&inst->ctrl_handler, > + &roi_mbqp_size, NULL); > } else { > ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, > &iris_ctrl_ops, > diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2.c b/drivers/media/platform/qcom/iris/iris_hfi_gen2.c > index 3b8fbefb8b93576962abd3850215f7b7fb364930..d628bc6748438b19dac01cd11cb9f8da0b8500af 100644 > --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2.c > +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2.c > @@ -1782,6 +1782,19 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = { > .flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, > .set = iris_set_req_sync_frame, > }, > + { > + .cap_id = ROI_PARAMS, > + .step_or_mask = 1, > + .p_array = NULL, > + .hfi_id = HFI_PROP_ROI_INFO, > + .flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_CUSTOM | > + CAP_FLAG_DYNAMIC_ALLOWED, > + }, > + { > + .cap_id = MB_SIZE, > + .step_or_mask = 1, > + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_CUSTOM, > + }, > }; > > static const u32 sm8550_vdec_input_config_params_default[] = { > diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h > index f43aea10090d8f1d6ae5c20547e5f6321b2ca203..08fc1036013de29e51747a6425ae7bb805ca3e0f 100644 > --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h > +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h > @@ -133,6 +133,7 @@ enum hfi_flip { > #define HFI_PROP_DEC_START_FROM_RAP_FRAME 0x03000169 > #define HFI_PROP_NO_OUTPUT 0x0300016a > #define HFI_PROP_BUFFER_MARK 0x0300016c > +#define HFI_PROP_ROI_INFO 0x03000173 > #define HFI_PROP_WORST_COMPRESSION_RATIO 0x03000174 > #define HFI_PROP_WORST_COMPLEXITY_FACTOR 0x03000175 > #define HFI_PROP_RAW_RESOLUTION 0x03000178 > diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h > index 9748095091461ba13443c63955a42906fa4f050c..9910eb5514b3ae0a6b5349adb071d0a56375102c 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_common.h > +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h > @@ -186,6 +186,8 @@ enum platform_inst_fw_cap_type { > LAYER5_BITRATE_HEVC, > REQUEST_SYNC_FRAME, > TIME_DELTA_BASED_RC, > + ROI_PARAMS, > + MB_SIZE, > INST_FW_CAP_MAX, > }; > > @@ -197,6 +199,7 @@ enum platform_inst_fw_cap_flags { > CAP_FLAG_CLIENT_SET = BIT(4), > CAP_FLAG_BITMASK = BIT(5), > CAP_FLAG_VOLATILE = BIT(6), > + CAP_FLAG_CUSTOM = BIT(7), > }; > > struct platform_inst_fw_cap { > @@ -206,6 +209,8 @@ struct platform_inst_fw_cap { > s64 step_or_mask; > s64 value; > u32 hfi_id; > + const void *p_array; > + u32 elems; > enum platform_inst_fw_cap_flags flags; > int (*set)(struct iris_inst *inst, > enum platform_inst_fw_cap_type cap_id); > Reviewed-by: Vishnu Reddy